Interconnect Structure With Carbon-Graded Dielectric for Hybrid Bonding

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Solution Overview

Problem

Achieving co-planarity of surfaces in hybrid bonding between substrates with conductive and insulating materials is challenging, leading to defects and voids due to dishing and surface irregularities, especially when using traditional dielectric materials with low dielectric constants.

Innovation Solution

Incorporating a dielectric with carbon or carbon and nitrogen as an etch stop layer to facilitate polish processes and prevent dishing, while also acting as a diffusion barrier to prevent copper diffusion, and chemically treating the surface to reduce carbon content for improved bonding.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional dielectric materials with low dielectric constants are used, then electrical insulation performance is improved, but surface co-planarity deteriorates due to dishing and irregularities

Engineering Contradiction:
Improveelectrical insulation performanceVSAvoidsurface co-planarity
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent uses a composite dielectric material containing carbon particles dispersed in a low-k dielectric matrix. This composite structure maintains the electrical insulation properties of the low-k material while the carbon particles reinforce the surface to prevent dishing and improve co-planarity during CMP processes

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The patent modifies the physical and chemical parameters of the dielectric material by incorporating carbon particles with specific size ranges (0.1-10 micrometers) and concentrations (1-50 wt%), which changes the mechanical strength and surface stability parameters to prevent dishing while maintaining electrical insulation

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If chemical mechanical polish processes are used to planarize surfaces, then surface flatness is improved, but dishing and void formation worsen

Engineering Contradiction:
Improvesurface flatnessVSAvoidvoid formation
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent applies local quality enhancement by distributing carbon particles throughout the dielectric material to provide localized reinforcement where needed during CMP. The carbon particles are strategically positioned to prevent dishing in high-stress areas while maintaining overall surface flatness

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The carbon particles act as a preventive cushioning mechanism before dishing occurs during CMP. They reinforce the dielectric surface in advance, distributing the mechanical stress of polishing to prevent the formation of dished areas and subsequent voids

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Reliability

If conductive materials are placed adjacent to insulating materials, then electrical functionality is improved, but material property control becomes more difficult

Engineering Contradiction:
Improveelectrical functionalityVSAvoidmaterial property control
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The carbon-containing dielectric material serves as an intermediary layer between conductive interconnects and other dielectric layers. It provides a stable, controllable interface that manages the transition between conductive and insulating materials, facilitating precise control of electrical properties at material boundaries

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution ensures co-planar surfaces for effective bonding, reduces void formation, and enhances electrical performance by preventing copper diffusion and minimizing aspect ratio during fabrication.

Implementation Method 1

Incorporating a dielectric with carbon or carbon and nitrogen as an etch stop layer to facilitate polish processes and prevent dishing

Methodology Applied
Scientific EffectEtch stop:

Implementation Method 2

acting as a diffusion barrier to prevent copper diffusion

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Implementation Method 3

chemically treating the surface to reduce carbon content for improved bonding

Methodology Applied
Scientific EffectChemical treatment:

Data Source

PatentUS11887887B2Interconnect structures and methods of fabrication
Publication Date: 2024.01.30 INTEL CORP
  • US11887887B2 patent drawing
  • US11887887B2 patent drawing
  • US11887887B2 patent drawing

AI summary

An integrated circuit interconnect structure includes a first interconnect in a first metallization level and a first dielectric adjacent to at least a portion of the first interconnect, where the first dielectric having a first carbon content. The integrated circuit interconnect structure further includes a second interconnect in a second metallization level above the first metallization level. The second interconnect includes a lowermost surface in contact with at least a portion of an uppermost surface of the first interconnect. A second dielectric having a second carbon content is adjacent to at least a portion of the second interconnect and the first dielectric. The first carbon concentration increases with distance away from the lowermost surface of the second interconnect and the second carbon concentration increases with distance away from the uppermost surface of the first interconnect.