Interconnect Circuit Reducing Signal Blocking with Bypass Links
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Solution Overview
Problem
Interconnect circuits suffer from 'blocking' where signals collide at internal nodes, leading to increased latency as blocked signals are diverted to incorrect outputs and require re-routing, resulting in a significant percentage of signals not reaching their intended destinations.
Innovation Solution
A circuit design incorporating a first and second switch matrix, primary bypass links, and redirection layers to direct signals efficiently, allowing for alternative paths without re-generating payloads, thereby reducing blocking occurrences.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a traditional switch matrix (Omega or Clos network) is used to switch signals from inputs to outputs, then the circuit structure is relatively simple, but blocking occurs when multiple signals compete for the same output path, significantly increasing latency and reducing the percentage of signals reaching their intended destinations
Solution Approach 1:
The circuit is segmented into multiple functional layers: a first switch matrix for initial signal distribution, redirection layers for intelligent path selection, and primary bypass links for direct signal transmission. This segmentation allows each component to specialize in specific tasks, reducing blocking while maintaining overall system manageability
Solution Approach 2:
Redirection layers act as intermediary components between the first switch matrix and the second switch matrix. These intermediaries intelligently redirect signals that would otherwise be blocked, providing alternative paths without requiring complete re-routing to input ports, thus improving signal delivery reliability
2Loss of time
If signals are blocked and diverted to incorrect outputs in a traditional switch matrix, then the circuit structure remains simple, but latency increases significantly as signals require re-generation and re-routing
Solution Approach 1:
The redirection layers perform preliminary action by detecting and redirecting blocked signals before they reach incorrect outputs. This proactive intervention prevents blocking from occurring in the first place, eliminating the need for signal re-generation and re-routing, thus significantly reducing transmission latency
Solution Approach 2:
The circuit maintains continuity of useful action by providing alternative paths through redirection layers and bypass links. Signals continue their forward progression without interruption or backtracking to input ports, ensuring continuous data flow and minimizing latency
3Device complexity
If the number of intermediate ports is reduced in the second switch matrix, then the circuit complexity is reduced, but the ability to handle blocked signals is limited
Solution Approach 1:
The circuit creates copying paths through primary bypass links that duplicate the function of the second switch matrix for specific signal groups. This allows signals to be handled through alternative routes without requiring additional intermediate ports in the main switch matrix, maintaining blocking handling capability while controlling complexity
Data Source
AI summary
A circuit having multiple inputs and multiple outputs the circuit being for switching signals received at any of the inputs to any of the outputs, the circuit comprising: a first switch matrix, the first switch matrix being capable of directing signals received at the inputs of the circuit to multiple first intermediate ports; a second switch matrix, the second switch matrix being capable of directing signals received at multiple second intermediate ports to multiple third intermediate ports, the number of the second intermediate ports being less than the number of the inputs of the circuit; one or more primary bypass links, each primary bypass link being capable of coupling one or more of the first intermediate ports to a respective one or more of the outputs of the circuit independently of the second switch matrix; a first redirection layer, the first redirection layer being capable of, for each first intermediate port, directing a signal received at that first intermediate port to a primary bypass link or to a second intermediate port; and a second redirection layer, the second redirection layer being capable of directing signals received at each of the primary bypass links to a respective one or more outputs of the circuit, and directing signals received at each of the third intermediate ports to a respective one or more outputs of the circuit.