Interconnect Structure with Compliant Wires for TCE Mismatch
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Solution Overview
Problem
Current interconnect structures face challenges in providing stress-relief, cost-effectiveness, and reworkability as the semiconductor industry transitions to three-dimensional ICs and low thermal coefficient of expansion packages, leading to limitations in scaling down pitch size and compromising thermo-mechanical reliability.
Innovation Solution
A second-level interconnect structure comprising a dielectric body element with conductive wires extending perpendicularly from both surfaces, providing compliance under physical stress and minimizing solder wetting, made from materials like low-stiffness polymers or ceramic, allowing for scalable and reworkable connections between electronic components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional solder based interconnect structures are used, then electrical connection is achieved, but stress-relief is insufficient and TCE mismatch creates reliability issues
Solution Approach 1:
The patent employs a composite interconnect structure combining a solder joint with a compliant underfill material. The underfill material has different mechanical properties (lower modulus, higher TCE) than the solder, creating a composite system that absorbs thermal stress while maintaining electrical connection. This resolves the contradiction by improving reliability through material composition rather than structural complexity.
Solution Approach 2:
The invention changes the physical parameters of the underfill material, specifically its glass transition temperature (Tg) and modulus, to optimize stress relief. By selecting materials with appropriate Tg ranges and mechanical properties, the structure accommodates TCE mismatch between package and PCB without requiring complex design modifications.
2Manufacturing precision
If fine-pitch scaling is pursued with traditional solder compositions, then higher density connections are achieved, but TCE mismatch induces stress and reliability degradation
Solution Approach 1:
The patent addresses fine-pitch scaling by changing the mechanical parameters of the underfill material, specifically its modulus and TCE, to match the requirements of high-density interconnects. The compliant material properties are optimized to relieve stress at smaller pitch dimensions where stress concentration would otherwise be problematic.
Solution Approach 2:
The underfill material provides localized stress relief specifically at the interconnect regions, allowing fine-pitch scaling without compromising overall structure reliability. The compliant material is positioned strategically between the rigid solder joint and the PCB to absorb localized thermal stresses.
3Reliability
If underfill is used to provide stress-relief, then thermo-mechanical reliability is improved, but reworkability is prevented
Solution Approach 1:
The patent utilizes the dynamic mechanical properties of the underfill material, specifically its glass transition behavior, to enable reworkability. By controlling the Tg of the underfill, the material transitions from a compliant state during operation to a more rigid state during rework processes, or vice versa, allowing for controlled assembly and disassembly while maintaining reliability during normal use.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The interconnect structure achieves stress-relief, cost-effectiveness, and reworkability while maintaining electrical performance, enabling scaling to fine pitches and accommodating thermal expansion mismatches between low-TCE packages and PCBs, enhancing thermo-mechanical reliability.
Implementation Method 1
The first and second portions can be configured to provide compliance upon application of physical stresses thereto
Implementation Method 2
A fraction of the first and second portions can comprise a coating configured to minimize or prevent surface wetting by a solder composition
Data Source
AI summary
The various embodiments of the present invention provide a stress-relieving, second-level interconnect structure that is low-cost and accommodates TCE mismatch between low-TCE packages and PCBs. The various embodiments of the interconnect structure are reworkable and can be scaled to pitches from about 1 millimeter (mm) to about 150 micrometers (μm). The interconnect structure comprises a dielectric body element and at least one interconnection array that provides a conductive path between two electronic components. Each interconnection array comprises a plurality of wires that provide both conductivity and compliance to the overall interconnect structure. The versatility and scalability of the interconnect structure of the present invention make it a desirable structure to utilize in current two-dimensional and ever-evolving three-dimensional IC structures.