Interconnect Die Routing Without a Separate Interposer

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Solution Overview

Problem

The use of 2.5D semiconductor packages with interposers increases costs due to the need for separate interposers, which are expensive to design, manufacture, and test.

Innovation Solution

The implementation of an interconnect die that electrically connects at least two IC dice, eliminating the need for an interposer by providing mechanical and electrical coupling directly between the IC dice and the package substrate, and incorporating programmable elements for enhanced routing flexibility.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a 2.5D package architecture with an interposer is used to connect multiple IC dice, then electrical signals can be conveyed among the IC dice and to the package substrate, but the cost significantly increases due to separate design, manufacture, and testing of the interposer

Engineering Contradiction:
Improveelectrical signal conductionVSAvoidinterposer design and manufacturing
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the interposer functionality directly into one of the IC dice by forming through-die vias (TDVs) through the entire thickness of the die. This eliminates the need for a separate interposer component, as the interconnect functionality is integrated within the die itself. The TDVs extend from the first surface to the second surface of the die, allowing direct electrical connection between upper and lower metallization layers without requiring an external interposer substrate.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The IC die is designed to perform multiple functions: it serves both as the active circuit component and as the interconnection substrate. By integrating TDVs and multiple metallization layers within the same die, the device simultaneously provides signal processing, signal routing, and mechanical support functions that were previously separated between the IC die and interposer.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If an interposer is used to provide routing for multiple circuits, then protocol-based communications and debugging are facilitated, but the area required for die coupling increases

Engineering Contradiction:
Improverouting flexibilityVSAvoidpackage area
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent transitions from planar routing on a separate interposer substrate to three-dimensional routing within the die volume. TDVs provide vertical interconnection paths through the die thickness, enabling signal routing in the vertical dimension rather than requiring extended lateral routing paths on a large interposer substrate. This reduces the overall package footprint while maintaining routing flexibility.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If through-die vias are formed to connect metallization layers on both surfaces of the die, then electrical connections are established among IC dice and to the package substrate, but manufacturing complexity increases

Engineering Contradiction:
Improveelectrical interconnectionVSAvoidthrough-die via fabrication
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The through-die vias are formed and filled with conductive material during the semiconductor fabrication process, before the die is packaged. This preliminary formation of TDVs with metallization layers allows subsequent bonding and packaging operations to proceed without additional via formation steps, simplifying the overall manufacturing process despite the added complexity of TDV creation.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentEP3363048B1Interconnect-die for inter-chip interconnection
Publication Date: 2025.04.23 XILINX INC
  • EP3363048B1 patent drawingFigure 1~2
  • EP3363048B1 patent drawingFigure 3A~3E
  • EP3363048B1 patent drawingFigure 3F~3H

AI summary

Techniques for providing a semiconductor assembly having an interconnect die (106) for die-to-die interconnection, an IC package (100), a method for manufacturing, and a method for routing signals in an IC package are described. In one implementation, a semiconductor assembly is provided that includes a first interconnect die (106) coupled to a first integrated circuit (IC) die (102) and a second IC die (102) by inter-die connections (108). The first interconnect die includes solid state circuitry (122) that provides a signal transmission path between the IC dice.