Interconnect Die Packaging With RDLs for Dense Multi-Die Integration
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Solution Overview
Problem
The increasing complexity of integrated circuit packages, which include multiple device dies and interposers with through-silicon vias, poses challenges in terms of cost, manufacturing complexity, and the need for high-density interconnections.
Innovation Solution
The use of interconnect dies with redistribution lines (RDLs) to connect device dies without the need for conventional interposers, allowing for high-density interconnections and reducing manufacturing costs by eliminating the requirement for through-silicon vias.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional interposers with through-silicon vias are used to interconnect device dies, then high-density interconnections can be achieved, but manufacturing complexity and costs increase
Solution Approach 1:
The patent extracts and eliminates the interposer component from the traditional package structure. By directly bonding device dies to the package substrate without an interposer, the design removes the need for through-silicon vias and complex interposer fabrication processes, thereby reducing manufacturing complexity while maintaining interconnection functionality through direct die-to-substrate bonding
Solution Approach 2:
The package substrate assumes multiple functions: it serves as both the mounting platform for device dies and as the interconnection medium that previously required a separate interposer. The substrate is designed with integrated routing capabilities that combine the functions of mechanical support and electrical interconnection, eliminating the need for dedicated interposer structures
2Adaptability or versatility
If multiple device dies are packaged in the same package to achieve more functions, then functionality increases, but manufacturing complexity increases
Solution Approach 1:
The patent divides the package into modular components: multiple device dies (processors, memory cubes, I/O devices) are independently fabricated and then bonded to the package substrate. This segmentation allows each die to be manufactured separately using optimized processes, then assembled into a functional package, reducing overall manufacturing complexity while enabling diverse functionality
Solution Approach 2:
The patent transitions from planar packaging to three-dimensional stacking arrangements. Device dies are bonded in vertical layers on the package substrate, with interconnections routed through vertical vias and horizontal trace layers. This dimensional change enables higher device density and functionality within the same footprint while simplifying the interconnection architecture
3Manufacturing precision
If through-silicon vias are formed in the interposer to interconnect features, then high-density interconnections are achieved, but manufacturing costs increase
Solution Approach 1:
The patent replaces expensive through-silicon via fabrication with a simpler, more cost-effective interconnection approach. Instead of forming high-cost through-silicon vias in a separate interposer, the design uses standard PCB-like trace and via structures on the package substrate, which are significantly cheaper to manufacture while achieving the same interconnection density
Data Source
AI summary
A method includes bonding a first device die and a second device die to an interconnect die. The interconnect die includes a first portion over and bonded to the first device die, and a second portion over and bonded to the second device die. The interconnect die electrically connects the first device die to the second device die. The method further includes encapsulating the interconnect die in an encapsulating material, and forming a plurality of redistribution lines over the interconnect die.