Interconnect Structure With Dielectric Sidewall Shielding
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Solution Overview
Problem
The challenge in semiconductor fabrication is the damage caused to low dielectric constant (LK) materials during the patterning process, such as etching, which affects the integrity of interconnect structures in integrated chips.
Innovation Solution
A method involving the deposition of a low-k dielectric layer over a substrate, followed by forming dielectric features along the sidewalls and bottom surfaces of openings, and then selectively removing these features to protect the LK dielectric layer from damage during subsequent etching processes, thereby forming an interconnect structure with reduced damage and improved reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a patterning process such as etching is performed to form a desired pattern in LK materials or ELK materials, then the interconnect structure can be formed, but the LK/ELK dielectric layer may be damaged due to prolonged exposure to the etching process
Solution Approach 1:
A protective film is deposited over the LK dielectric layer before the etching process begins. This preliminary protective action prevents direct exposure of the LK layer to damaging etchants and plasma during the patterning process, thereby maintaining layer integrity while still allowing pattern formation to proceed
Solution Approach 2:
The protective film acts as an intermediary layer between the etching process and the LK dielectric layer. It provides a barrier that shields the sensitive LK material from direct contact with harmful etchants and plasma, enabling the etching process to complete pattern formation without directly damaging the underlying LK layer
2Manufacturing precision
If the etching process is extended to achieve the desired pattern complexity, then manufacturing precision improves, but the damage to the LK dielectric layer increases
Solution Approach 1:
The protective film is deposited in advance before any etching operations commence. This preliminary protective measure ensures that regardless of how extended or complex the subsequent etching process becomes, the LK dielectric layer remains shielded from plasma-induced damage throughout the entire manufacturing sequence
Solution Approach 2:
The protective film serves as a mediator that absorbs or blocks the harmful effects of prolonged plasma exposure and extended etching processes. It allows complex pattern formation to proceed while preventing the accumulation of damage to the LK dielectric layer over time
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach mitigates damage to the LK dielectric layer, enhancing the yield and reliability of the interconnect structure by using dielectric films to shield the layer from plasma-induced damage during the etching process.
Implementation Method 1
forming dielectric features along the sidewalls and bottom surfaces of openings, and then selectively removing these features to protect the LK dielectric layer from damage during subsequent etching processes
Implementation Method 2
The deposition of a low-k dielectric layer over a substrate
Data Source
AI summary
An interconnect structure and a method of forming an interconnect structure are disclosed. The interconnect structure includes a low-k (LK) dielectric layer over a substrate; a first conductive feature in the LK dielectric layer, wherein the first conductive feature has a first sidewall, a second sidewall facing the first sidewall, and a first bottom surface contacting the LK dielectric layer; a first dielectric feature along an upper portion of the first sidewall, wherein a length of the first dielectric feature is at least 10 percent less than a length of the first sidewall; and a second dielectric feature along an upper portion of the second sidewall. The interconnect structure may also include a second conductive feature adjacent to the first conductive feature in the LK dielectric layer.