Semiconductor Interconnect Structure With Dual Etch Stop Via Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As semiconductor devices continue to shrink, challenges arise in creating high-performance interconnect structures due to issues like loss of mask material, constrained process windows, and inconsistencies in via profiles, particularly in the fabrication of interconnects with smaller critical dimension sizes.
Innovation Solution
The introduction of an added etch stop layer around the junction of a via and a trench in the interconnect structure, which serves as a hard mask to facilitate precise patterning and filling with conductive material, improving via faceting control and addressing the challenges of smaller critical dimensions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If conventional interconnect structures are used with smaller critical dimension sizes, then device scaling is achieved, but via faceting control deteriorates and mask material is lost
Solution Approach 1:
The interconnect structure is segmented into multiple functional layers: a first etch stop layer positioned at a first depth and a second etch stop layer positioned at a second depth. This segmentation allows each layer to perform specific functions in controlling the via profile during etching, thereby maintaining via faceting control even as critical dimension sizes decrease.
Solution Approach 2:
The solution introduces a vertical dimensionality aspect by positioning etch stop layers at different depths within the via structure. This depth-based arrangement creates a three-dimensional control mechanism that prevents via faceting issues without requiring changes to the lateral critical dimensions, thus resolving the contradiction between scaling and manufacturing precision.
2Length of moving object
If conventional interconnect structures are used with smaller critical dimension sizes, then device scaling is achieved, but process window becomes constrained
Solution Approach 1:
The multi-layer etch stop structure segments the etching process into distinct stages, with each etch stop layer providing control at a specific depth. This segmentation broadens the process window by allowing independent optimization of etching parameters for each layer, making the process more adaptable to smaller critical dimension sizes.
3Length of moving object
If conventional interconnect structures are used with smaller critical dimension sizes, then device scaling is achieved, but via profile consistency deteriorates
Solution Approach 1:
The via profile is controlled through segmented etch stop layers at different depths, with the first etch stop layer managing the upper portion and the second etch stop layer managing the lower portion. This segmentation ensures consistent via profiles by providing localized control mechanisms that prevent deviations even as critical dimension sizes decrease.
Solution Approach 2:
Different regions of the via structure are assigned different functional qualities through the placement of etch stop layers at specific depths. The first etch stop layer provides local control at the first depth while the second etch stop layer provides local control at the second depth, ensuring overall via profile consistency through localized quality control.
Data Source
AI summary
A semiconductor interconnect structure includes a conductive line electrically coupled to an active semiconductor device, a first etch stop layer formed over the conductive line, a first dielectric layer formed over the first etch stop layer, a second etch stop layer formed over the first dielectric layer, a second dielectric layer formed over the second etch stop layer, and an interconnect structure electrically coupled to the via and extending through the first etch stop layer, the first dielectric layer, the second etch stop layer, and the second dielectric layer. The interconnect structure includes a via extending through the first etch stop layer, the second etch stop layer, and the first dielectric layer and a trench extending through the second dielectric layer.