Interconnect Layout With EMI Shielding for Power and Signal Paths

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Solution Overview

Problem

Conventional interconnect components in electronic devices face limitations due to shared surface transmission of power and electrical signals, leading to occupied I/O pins and interference from power signals affecting high-speed circuitry performance.

Innovation Solution

The electronic device incorporates a first interconnection structure with a power connection on its active surface and a non-power connection along its lateral surface, featuring a second non-power connection configured to block electromagnetic interference between power and non-power paths, and includes conductive elements that function as shielding to minimize noise and interference.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If power signals and electrical signals are transmitted through the same surface of a component, then the interconnect structure is simple, but I/O pins are occupied and limited and electromagnetic interference occurs

Engineering Contradiction:
Improveinterconnect structureVSAvoidI/O pin availability
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The patent transitions from two-dimensional surface transmission to three-dimensional transmission by routing power signals through the thickness direction of the interposer substrate. Power connections are established through vias that penetrate the substrate, allowing power to be transmitted from one surface to the opposite surface without occupying I/O pins on the active surface.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent segments the transmission paths by separating power signal transmission from electrical signal transmission. Power signals are routed through dedicated vertical via structures, while electrical signals are transmitted through horizontal trace structures on the surfaces, eliminating interference and freeing up I/O pins.

Inventive Principle:
Principle #1Segmentation

2Device complexity

If power signals and electrical signals share the same transmission path, then the structure is simplified, but electromagnetic interference from power signals affects high-speed circuitry performance

Engineering Contradiction:
Improvetransmission path structureVSAvoidhigh-speed circuitry performance
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent divides the transmission system into separate domains: power transmission through vertical via paths and signal transmission through horizontal trace paths. This spatial segmentation prevents electromagnetic coupling between power and signal lines, eliminating interference issues while maintaining structural efficiency.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The interposer substrate acts as an intermediary that mediates between power delivery and signal transmission. The substrate provides isolated pathways where power vias and signal traces do not interfere with each other, allowing both functions to coexist without electromagnetic interference.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Power

If I/O pins are used for power transmission, then power delivery is achieved, but the number of available pins for electrical signals is reduced

Engineering Contradiction:
Improvepower transmission capabilityVSAvoidI/O pin count
Core Design Contradiction:
PowerVSAdaptability or versatility

Solution Approach 1:

The patent moves power transmission from the two-dimensional surface plane to the three-dimensional vertical dimension by using through-substrate vias. This allows power to be delivered through the bulk of the interposer without consuming surface I/O pin locations, maximizing the availability of pins for electrical signal connections.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances power transmission efficiency, reduces electromagnetic interference, and optimizes the use of I/O pins by separating power and non-power paths, thereby improving the performance of high-speed circuitry and allowing for easier modification and mounting on different carriers.

Implementation Method 1

a second non-power connection disposed between the first interconnection structure and the active surface of the first electronic component. The second non-power connection is configured to block an electromagnetic interference (EMI) between the power connection and the first non-power connection

Methodology Applied
Scientific EffectElectromagnetic interference blocking: Faraday Cage

Implementation Method 2

The electronic device also includes a plurality of first ground vias disposed in the second electronic component. The electronic device also includes a plurality of first power vias disposed in the second electronic component and disposed between the first electronic component and at least one of the plurality of first ground vias

Methodology Applied
Scientific EffectElectromagnetic shielding: Faraday Cage

Data Source

PatentUS20240055365A1Electronic device
Publication Date: 2024.02.15 ADVANCED SEMICON ENG INC
  • US20240055365A1 patent drawing
  • US20240055365A1 patent drawing
  • US20240055365A1 patent drawing

AI summary

An electronic device is disclosed. The electronic device includes a first interconnection structure, and a first electronic component disposed over the first interconnection structure and having an active surface and a lateral surface. The electronic device also includes a power connection disposed between the first interconnection structure and the active surface of the first electronic component, and a first non-power connection extending along the lateral surface of the first electronic component and electrically connected to the first interconnection structure. The electronic device also includes a second non-power connection disposed between the first interconnection structure and the active surface of the first electronic component. The second non-power connection is configured to block an electromagnetic interference (EMI) between the power connection and the first non-power connection.