Interconnect Structure With Self-Aligned Etch Stop for Via Overlay
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Solution Overview
Problem
In the semiconductor industry, forming interconnect structures for FinFET devices poses challenges in reducing resistance and ensuring reliable via-to-line overlay and TDDB windows, particularly as device scales shrink, due to limitations in existing methods for forming conductive connections without additional glue layers and protecting dielectric materials during etching processes.
Innovation Solution
The method involves forming a self-aligned etching stop layer that acts as a glue layer to directly contact the metal bulk layer with the via, eliminating the need for additional conductive glue layers and using a conformal etching stop layer to protect dielectric layers during etching, thereby reducing resistance and enhancing the reliability of interconnect structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If additional conductive glue layers are used to form connections between metal bulk layer and via, then connection reliability is improved, but device complexity and manufacturing steps increase
Solution Approach 1:
The patent removes the additional conductive glue layer from the interconnect structure, relying instead on direct contact between the metal bulk layer and via, supported by the self-aligned etching stop layer to maintain connection reliability while reducing structural complexity
Solution Approach 2:
The self-aligned etching stop layer serves multiple functions: it acts as an etch barrier to protect underlying layers, provides a planar surface for metal deposition, and enables direct contact between metal bulk layer and via, eliminating the need for separate glue layers
2Reliability
If additional conductive glue layers are used to form connections, then connection reliability is improved, but manufacturing time and process steps increase
Solution Approach 1:
The patent combines multiple functions into the self-aligned etching stop layer, which simultaneously provides etch protection, deposition surface, and alignment reference, eliminating the need for separate glue layer deposition and integration steps
Solution Approach 2:
The self-aligned etching stop layer is formed beforehand to establish precise alignment and provide a ready surface for metal bulk layer deposition, ensuring proper via-to-line overlay before the metal connection is made
3Ease of manufacture
If conventional etching processes are used without protective layers, then manufacturing simplicity is maintained, but dielectric layers suffer from etching damage
Solution Approach 1:
The self-aligned etching stop layer acts as an intermediary protective barrier between the etching process and the dielectric layers, preventing etching damage while allowing the etch to proceed through other necessary layers to form the interconnect structure
Data Source
AI summary
An interconnect structure is provided. The interconnect structure includes a first metal line and a second metal line, a first dielectric layer including a potion between the first metal line and the second metal line, and a first etching stop layer on the potion of the first dielectric layer.A bottom surface of the first etching stop layer is level to a top surface of the first metal line and a top surface of the second metal line. The interconnect structure also includes a second etching stop layer including a first portion extending along the top surface of the second metal line, a second portion extending along a first sidewall of the first etching stop layer, and a third portion extending along a top surface of the first etching stop layer. The interconnect structure also includes a via on the first metal line.