Interconnect Structure Without Glue Layers for Low Contact Resistance

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Solution Overview

Problem

As ICs evolve with smaller features, contact resistance in multilayer interconnects (MLIs) increases, impeding current flow and delaying signal routing, which is not adequately addressed by conventional contacts.

Innovation Solution

A method for fabricating MLI structures without glue layers by depositing a blocking layer to prevent etch stop layers from forming on capping layers, allowing direct electrical coupling between metal features, and patterning to create trenches for low-resistance paths.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional contacts are used in advanced IC technology nodes, then manufacturing process is simpler, but contact resistance increases and signal routing is delayed

Engineering Contradiction:

Improvecontact resistanceVSAvoidprocessing complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The contact structure is divided into multiple segments: a first contact portion extending through the dielectric layer to the semiconductor surface, and a second contact portion extending through the capping layer to electrically couple with the first contact portion. This segmentation allows each portion to be optimized for its specific function, reducing overall contact resistance while maintaining manufacturing feasibility

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The contact structure transitions from a conventional planar contact to a three-dimensional structure with vertical portions extending through multiple layers. The first contact portion extends vertically through the dielectric layer, and the second contact portion extends vertically through the capping layer, creating a multi-dimensional electrical pathway that reduces resistance without increasing lateral footprint

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Productivity

If feature size is reduced to increase functional density, then production efficiency increases and costs decrease, but contact resistance increases and impedes current flow

Engineering Contradiction:

Improveproduction efficiencyVSAvoidcontact resistance

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The contact structure implements local quality by creating a concentrated, high-conductivity pathway through the dielectric and capping layers. The first and second contact portions are locally optimized with specific materials and geometries to minimize resistance at the critical contact region, while the rest of the interconnect structure maintains standard dimensions for high-density integration

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The contact structure uses composite materials comprising a first contact material for the first contact portion and a second contact material for the second contact portion. These materials are selected to provide low resistance and good adhesion properties, combining the advantages of different materials to achieve superior electrical performance in the scaled contact structure

Inventive Principle:

Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces contact resistance and maintains adhesion, providing low-resistance MLI structures compatible with conventional materials, enhancing signal efficiency and reducing manufacturing complexity.

Implementation Method 1

selectively depositing a blocking layer over the capping layer; depositing an etch stop layer over the workpiece

Methodology Applied

Scientific EffectSelective deposition: Deposition (physical)

Implementation Method 2

the first metal feature is electrically coupled to the second metal feature

Methodology Applied

Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS20260033305A1Low-resistance interconnect

Publication Date: 2026.01.29 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

Integrated circuit devices and methods of forming the same are provided. A method according to the present disclosure includes providing a workpiece including a first metal feature in a dielectric layer and a capping layer over the first metal feature, selectively depositing a blocking layer over the capping layer, depositing an etch stop layer (ESL) over the workpiece, removing the blocking layer, and depositing a second metal feature over the workpiece such that the first metal feature is electrically coupled to the second metal feature. The blocking layer prevents the ESL from being deposited over the capping layer.