Barrier-Lined Interconnect Structure for Low-Resistance Vias
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Solution Overview
Problem
As IC technology advances, the increasing compactness of multilayer interconnect features leads to higher contact resistance, which delays signal transmission and poses performance, yield, and cost challenges due to the scaling down of IC feature sizes.
Innovation Solution
The formation of vias using an electroless plating process without a barrier material between the via and the underlying conductive feature, and the use of a blocking layer to prevent the deposition of a barrier layer on the via, resulting in direct contact between the via and the conductive features, thereby reducing contact resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multilayer interconnect features are scaled down to increase functional density, then production efficiency increases and costs decrease, but contact resistance increases significantly
Solution Approach 1:
The patent removes the barrier material layer that is traditionally present between the via and the underlying conductive feature. By extracting this intermediate layer, the via achieves direct contact with the conductive feature, thereby eliminating the contact resistance introduced by the barrier material while maintaining the benefits of scaled-down interconnect features
Solution Approach 2:
Instead of using a barrier material to prevent diffusion (conventional approach), the patent inverts the approach by using the via material itself to directly contact the conductive feature. The blocking layer is selectively removed from the via bottom to enable direct contact, reversing the traditional role of barrier materials in this interface
2Stability of the object's composition
If barrier material is used to line the via, then diffusion prevention is achieved, but contact resistance increases and signal transmission is delayed
Solution Approach 1:
The patent applies different properties to different regions: the blocking layer is present on the via sidewalls to prevent diffusion, but selectively removed from the via bottom to enable direct contact. This local differentiation allows simultaneous achievement of diffusion prevention and low contact resistance
Solution Approach 2:
The blocking layer serves as an intermediary that is strategically positioned and selectively removed. It provides diffusion prevention where needed (sidewalls) while being removed where direct contact is required (bottom), mediating between the conflicting requirements of diffusion prevention and low contact resistance
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach decreases contact resistance and enhances RC performance, allowing for efficient signal transmission and improved device performance by eliminating the barrier layer interface, which is typically present in conventional dual damascene structures.
Implementation Method 1
forming a via using an electroless plating process
Data Source
AI summary
Provided is an interconnect structure including: a first conductive feature, disposed in a first dielectric layer; a second conductive feature, disposed over the first conductive feature and the first dielectric layer; a via, disposed between the first and second conductive features and being in direct contact with the first and second conductive features; and a barrier structure, lining a sidewall and a portion of a bottom surface of the second conductive feature, a sidewall of the via, a portion of a top surface of the first conductive feature, and a top surface of the first dielectric layer.