Interconnect Material Layout for Low-Resistance Scaled Metal Lines
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Solution Overview
Problem
As semiconductor technology advances towards smaller technology nodes, the increased resistance in conductive features of interconnect structures leads to power consumption issues, reduced device speeds, and undesirable variations in device properties.
Innovation Solution
The method involves assigning materials to conductive features based on their dimensions, using copper, aluminum, or their combinations for high-dimensional features, cobalt, ruthenium, or their combinations for low-dimensional features, and hybrid structures for features between these thresholds, while also using blocking layers to reduce resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional conductive materials are used in low-dimensional interconnect structures, then manufacturing simplicity is maintained, but resistance increases leading to power consumption issues and reduced device speeds
Solution Approach 1:
The patent applies local quality by assigning different conductive materials to different interconnect structures based on their specific dimensional characteristics. Low-dimensional features receive materials optimized for small dimensions (e.g., copper, cobalt, tungsten) while high-dimensional features use cost-effective materials (e.g., aluminum, copper). This localized material optimization reduces resistance in critical low-dimensional paths without unnecessarily increasing complexity across the entire interconnect system.
Solution Approach 2:
The patent changes the material parameter of conductive features based on their dimensional parameters. By establishing dimensional thresholds and selecting materials accordingly, the system dynamically adapts material properties to match the specific needs of each interconnect structure's geometry, thereby optimizing electrical performance while managing manufacturing complexity.
2Reliability
If material variation is increased to optimize resistance in different dimensional features, then resistance performance improves, but manufacturing complexity increases
Solution Approach 1:
The patent implements parameter changes by establishing dimensional thresholds that trigger specific material selections. This systematic approach transforms a potentially complex multi-material manufacturing process into a rule-based decision framework, where the material parameter is automatically adjusted based on measurable dimensional parameters of each interconnect feature.
Solution Approach 2:
By applying local quality principles, the patent optimizes resistance performance specifically where needed (in low-dimensional features) while using simpler, more manufacturable materials in high-dimensional features where resistance is less critical. This targeted approach improves overall resistance performance without requiring complex multi-material processing across all interconnect structures.
3Ease of manufacture
If high-dimensional features use cost-effective materials like aluminum, then manufacturing cost decreases, but resistance properties may be suboptimal for those specific features
Solution Approach 1:
The patent applies local quality by matching material properties to the specific requirements of each interconnect feature's dimensions. High-dimensional features use cost-effective materials like aluminum where resistance is less critical, while low-dimensional features use materials with superior resistance properties. This localized optimization achieves cost reduction without sacrificing resistance performance where it matters most.
Data Source
AI summary
A semiconductor device includes a first underlying metal line and a second underlying metal line in a first dielectric layer over a substrate. The semiconductor device includes a first metal feature and a second metal feature in a second dielectric layer over the first dielectric layer. The first metal feature is over and connected to the first underlying metal line, and the second metal feature is over and connected to the second underlying metal line. The first metal feature has a first dimension, the second metal feature has a second dimension, the second dimension being greater than the first dimension. The first metal feature includes a first metal having a first mean free path, the second metal feature includes a second metal having a second mean free path, and the second mean free path is greater than the first mean free path.