Funnel-Shaped Interconnect Neck Profiling for BEOL Resistance Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current semiconductor manufacturing processes face challenges in effectively controlling the resistance of metal interconnects during the back-end-of-line processes due to limitations in the design and fabrication of funnel-shaped interconnects and conductive features.
Innovation Solution
The semiconductor device incorporates a wiring structure with a metal interconnect, a conductive feature having a head and neck portion, and a diffusion barrier liner, where the neck portion's thickness is adjusted by controlling etchant, pressure, and direct current superposition voltage during the etching process, allowing precise resistance control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the neck portion thickness is reduced to control resistance, then the resistance of the metal interconnect is improved, but the manufacturing precision becomes more difficult to control
Solution Approach 1:
The patent applies parameter changes by controlling etching conditions (etchant concentration, temperature, time) and deposition parameters to precisely adjust the neck portion thickness. By changing these process parameters, the invention achieves accurate control of the conductive feature's resistance while maintaining manufacturing feasibility.
Solution Approach 2:
The patent employs a multi-step dynamic process involving sequential etching and deposition operations. The process dynamically adjusts the neck portion dimensions through controlled material removal and addition, enabling precise resistance control that static processes cannot achieve.
2Reliability
If the included angle of the neck portion is optimized to reduce resistance, then the electrical performance is improved, but the device complexity increases
Solution Approach 1:
The patent applies local quality by creating a specific geometric configuration (funnel shape with optimized included angle) only in the neck portion region where resistance control is critical. The rest of the interconnect structure maintains standard geometry, thus improving electrical performance locally without unnecessarily complicating the entire device structure.
3Reliability
If the diffusion barrier liner thickness is increased to prevent diffusion, then the reliability is improved, but the manufacturing precision of the conductive feature dimensions deteriorates
Solution Approach 1:
The patent optimizes the diffusion barrier liner thickness parameter to achieve the minimum effective barrier while maintaining dimensional control. By carefully selecting the liner thickness parameter and adjusting related process parameters (deposition conditions, etching selectivity), the invention prevents diffusion without excessively impacting the precision of conductive feature dimensions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables effective resistance control of the wiring structure, enhancing the performance of semiconductor devices by optimizing the neck portion's thickness and included angle, thereby improving the overall back-end-of-line processes.
Implementation Method 1
The neck portion's thickness is adjusted by controlling etchant, pressure, and direct current superposition voltage during the etching process
Implementation Method 2
depositing a conductive material on the diffusion barrier layer
Data Source
AI summary
The present application provides a semiconductor device and a method of manufacturing the semiconductor device. The semiconductor device includes a substrate and a wiring structure. The wiring structure includes at least one metal interconnect disposed on the substrate, at least one conductive feature disposed on the metal interconnect, and at least one diffusing barrier liner surrounding the conductive feature. The conductive feature has a head portion and a neck portion sandwiched between the metal interconnect and the head portion. The neck portion can have a first critical dimension, which gradually decreases at positions of increasing distance from the head portion.


