Interconnect Notch Design for Bridging Prevention

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Solution Overview

Problem

As semiconductor devices shrink, the reduced overlay window in multi-layer interconnect structures increases the likelihood of misalignment between upper and lower conductive devices, leading to circuit bridging defects due to exposed lower conductive devices creating bridging paths between adjacent upper conductive devices.

Innovation Solution

An interconnect structure featuring a substrate with a dielectric layer, a first conductive pattern, and a second conductive pattern where the exposed portion of the first conductive pattern has a notch, formed by an etching process using chlorine gas and a protective gas, to prevent bridging paths between adjacent conductive patterns, thereby increasing the overlay window.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of moving object

If the overlay window is reduced to increase integration density, then the chip surface utilization is improved, but misalignment between conductive devices occurs more easily

Engineering Contradiction:
Improveoverlay windowVSAvoidalignment precision
Core Design Contradiction:
Area of moving objectVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by forming a protective coating layer on the lower conductive device before the upper conductive device is formed. This pre-protection measure ensures that even if misalignment occurs during subsequent fabrication steps, the exposed lower conductive device remains insulated and cannot create bridging paths, thus resolving the contradiction between reduced overlay window and alignment precision.

Inventive Principle:
Principle #10Preliminary action

2Adaptability or versatility

If the lower conductive device is exposed due to misalignment, then the multi-layer interconnect design flexibility is improved, but circuit bridging defects occur

Engineering Contradiction:
Improveinterconnect design flexibilityVSAvoidcircuit reliability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent introduces an intermediary protective coating layer between the lower conductive device and the upper conductive device. This intermediary layer allows the lower conductive device to be exposed for design flexibility while simultaneously preventing circuit bridging by providing electrical insulation, thus resolving the contradiction between design flexibility and circuit reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Quantity of substance

If the exposed lower conductive device creates a bridging path, then the conductive connectivity is improved, but circuit bridging defects are created

Engineering Contradiction:
Improveconductive path continuityVSAvoidcircuit bridging defect
Core Design Contradiction:
Quantity of substanceVSObject-generated harmful factors

Solution Approach 1:

The patent converts the potentially harmful exposure of the lower conductive device into a beneficial situation by applying a protective coating. The coating transforms the exposed conductive surface from a source of bridging defects into a controlled interface that maintains design flexibility while preventing harmful electrical connections, thus resolving the contradiction between conductive connectivity and circuit bridging defects.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The notch in the exposed portion of the first conductive pattern effectively cuts bridging paths between adjacent conductive patterns, preventing circuit bridging defects and enhancing the overlay window between the second and first conductive patterns.

Implementation Method 1

a forming method of the notch includes partially removing the exposed portion of the first conductive pattern by performing an etching process on the exposed portion of the first conductive pattern with the second conductive pattern as a mask

Methodology Applied
Scientific EffectEtching:

Data Source

PatentUS9922876B1Interconnect structure and fabricating method thereof
Publication Date: 2018.03.20 MACRONIX INTERNATIONAL CO LTD
  • US9922876B1 patent drawing
  • US9922876B1 patent drawing
  • US9922876B1 patent drawing

AI summary

An interconnect structure including a substrate, a dielectric layer, a first conductive pattern, and a second conductive pattern is provided. The dielectric layer is disposed on the substrate and has an opening. The first conductive pattern is disposed in the opening. The second conductive pattern is disposed on the first conductive pattern and exposes an exposed portion of the first conductive pattern. The exposed portion of the first conductive pattern has a notch.