Semiconductor Interconnect Plug Layout for Lower Through-Hole Resistance
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Solution Overview
Problem
As semiconductor devices shrink, the reduced size of through-holes in interconnect structures increases interconnection resistance, leading to reduced power consumption and degraded electrical performance.
Innovation Solution
The method involves forming a substrate with first conductive layers, creating through-holes that expose these layers, and filling them with conductive plugs, followed by a second conductive layer that contacts the plugs, expanding the contact area from point-to-point to surface-to-surface, thereby reducing overall resistance and improving electrical performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the size of through-holes is reduced to meet device scaling requirements, then device density increases, but interconnection resistance increases
Solution Approach 1:
The patent transitions from point-to-point contact in traditional through-holes to surface-to-surface contact by forming conductive plugs that expose top surfaces contacting the second conductive layer. This dimensional change from 0D point contact to 2D surface contact significantly increases contact area and reduces resistance without increasing through-hole footprint
Solution Approach 2:
The conductive plug structure is segmented into multiple conductive layers (first conductive layer at bottom, second conductive layer at top) with exposed surfaces that create multiple contact interfaces. This segmentation allows the same through-hole volume to provide multiple parallel conduction paths, reducing overall resistance
2Ease of manufacture
If conventional point-to-point contact is used in through-holes, then manufacturing is simple, but resistance is high
Solution Approach 1:
The conductive plug structure self-generates extended contact surfaces through its formation process. The top surface of the conductive plug automatically contacts the second conductive layer, and the bottom surface contacts the first conductive layer, creating enlarged contact areas without requiring additional manufacturing steps beyond standard plug formation
Data Source
AI summary
A semiconductor device includes: a substrate; a plurality of first conductive layers disposed at the substrate, the plurality of first conductive layers being arranged in a first direction, each of the plurality of first conductive layers being parallel to a second direction, and the first direction being perpendicular to the second direction; a conductive plug disposed at the plurality of first conductive layers, the conductive plug being parallel to the first direction, and a bottom surface of the conductive plug being in contact with surfaces of the plurality of first conductive layers; and a second conductive layer disposed at the conductive plug, a bottom surface of the second conductive layer being in contact with a top surface of the conductive plug.