Sealing Structures for Interconnect Capping Layers

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Solution Overview

Problem

Current interconnect structures in microelectronic device fabrication lack sufficient encapsulation, leading to issues such as electromigration and diffusion of conductive materials due to gaps between the capping layer and the barrier layer, which can affect the reliability and quality of microelectronic devices.

Innovation Solution

A sealing structure is introduced to fill the gaps between the capping layer and the interconnect, using materials like silicon nitride or self-passivating oxide layers to create a hermetic barrier, which can be formed through various deposition methods and processes such as low-pressure physical vapor deposition or chemical reactions, ensuring improved encapsulation and preventing material migration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a standard capping layer is deposited over the interconnect, then the deposition process is simple and fast, but gaps form between the capping layer and barrier layer allowing conductive material migration

Engineering Contradiction:
Improvedeposition speedVSAvoidencapsulation integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The sealing structure is divided into multiple segments: a first sealing portion extending from the barrier layer to meet the capping layer, and a second sealing portion extending from the capping layer to meet the barrier layer. This segmentation ensures complete gap coverage while maintaining process efficiency.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The sealing structure is formed before final capping layer deposition is completed. By extending the sealing structure to substantially meet the capping layer initially, then completing the capping layer deposition, the method prevents gap formation from the outset while maintaining overall process efficiency.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If the capping layer is made thicker to ensure complete coverage, then encapsulation improves, but line resistance and capacitance are significantly impacted

Engineering Contradiction:
Improveencapsulation integrityVSAvoidline resistance and capacitance
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The sealing structure provides localized enhanced coverage at the critical gap regions between the capping layer and barrier layer, while the rest of the capping layer maintains its standard thickness. This targeted approach ensures encapsulation integrity without unnecessarily increasing overall line resistance or capacitance.

Inventive Principle:
Principle #3Local quality

3Reliability

If a sealing structure is added to fill gaps, then encapsulation is improved, but process complexity increases

Engineering Contradiction:
Improveencapsulation integrityVSAvoidprocess steps
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The sealing structure formation is merged with the existing capping layer deposition process. The sealing structure is formed using the same electroless plating process and is integrated into the same process flow, combining multiple functions into a unified process sequence rather than adding separate discrete steps.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The sealing structure serves multiple functions simultaneously: it prevents conductive material migration, provides additional encapsulation, and acts as part of the capping layer system. This multi-functionality reduces the need for separate dedicated sealing processes.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The sealing structure effectively reduces or prevents electromigration and diffusion of conductive materials, enhancing the reliability and quality of microelectronic devices by providing improved encapsulation of interconnects without significant impact on line resistance or capacitance.

Implementation Method 1

The sealing structure effectively reduces or prevents electromigration and diffusion of conductive materials

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Implementation Method 2

low-pressure physical vapor deposition

Methodology Applied
Scientific EffectPhysical vapor deposition: Physical Vapour Deposition

Implementation Method 3

chemical reactions

Methodology Applied
Scientific EffectChemical vapor deposition: Chemical Vapour Deposition

Data Source

PatentUS7402519B2Interconnects having sealing structures to enable selective metal capping layers
Publication Date: 2008.07.22 TAHOE RES LTD
  • US7402519B2 patent drawing
  • US7402519B2 patent drawing
  • US7402519B2 patent drawing

AI summary

Methods of fabricating a capped interconnect for a microelectronic device which includes a sealing feature for any gaps between a capping layer and an interconnect and structures formed therefrom. The sealing features improve encapsulation of the interconnect, which substantially reduces or prevents electromigration and/or diffusion of conductive material from the capped interconnect.