Interconnect Shield Structure for Signal Integrity

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Solution Overview

Problem

Integrated devices face challenges in minimizing cross-talk between interconnects, which affects signal integrity due to the lack of effective shielding in existing interconnect structures.

Innovation Solution

The implementation of an interconnect structure comprising an inner interconnect, a dielectric layer, and an outer conductive layer, where the outer conductive layer acts as a shield to reduce electromagnetic interference and cross-talk, thereby enhancing signal integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional interconnect structures are used, then device complexity is reduced, but cross-talk between interconnects increases and signal integrity deteriorates

Engineering Contradiction:
Improvesignal integrityVSAvoidinterconnect structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The interconnect structure is segmented into distinct functional layers: an inner conductive interconnect core, a dielectric layer, and an outer conductive shield layer. This segmentation allows each layer to perform its specific function independently, with the inner layer carrying signals and the outer layer providing electromagnetic shielding, thereby improving signal integrity while maintaining manageable complexity through modular design

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements a nested structure where the inner conductive interconnect is positioned within a dielectric layer, which is in turn surrounded by an outer conductive shield layer. This nested configuration allows the signal-carrying inner interconnect to be protected by the outer shield, reducing cross-talk and electromagnetic interference while maintaining a compact overall structure

Inventive Principle:
Principle #7Nested doll (Nesting)

2Reliability

If outer conductive shield layer is added, then cross-talk reduction is achieved, but manufacturing complexity increases

Engineering Contradiction:
Improveisolation between interconnectsVSAvoidfabrication process complexity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The dielectric layer is formed first as a preliminary step, creating a prepared substrate before the inner conductive interconnect is deposited. This preliminary action establishes the structural foundation and electrical isolation necessary for subsequent layers, making the overall manufacturing process more systematic and controllable

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent transitions from planar interconnect designs to a three-dimensional layered structure by adding vertical dimensionality with multiple conductive and dielectric layers stacked together. This dimensional change enables the outer shield layer to effectively surround and protect inner interconnects, providing superior isolation while the layer-by-layer fabrication approach maintains manufacturing feasibility

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration significantly reduces cross-talk between signals traveling through interconnects, improving signal integrity and providing improved isolation, especially when multiple interconnect structures with outer conductive layers are used.

Implementation Method 1

The outer conductive layer is configured to operate as a shield for the inner interconnect

Methodology Applied
Scientific EffectElectromagnetic shielding: Faraday Cage

Data Source

PatentUS11676922B2Integrated device comprising interconnect structures having an inner interconnect, a dielectric layer and a conductive layer
Publication Date: 2023.06.13 QUALCOMM INC
  • US11676922B2 patent drawing
  • US11676922B2 patent drawing
  • US11676922B2 patent drawing

AI summary

An integrated device that includes a substrate, an interconnect portion and an interconnect structure. The interconnect portion is located over the substrate. The interconnect portion includes a plurality of interconnects and at least one dielectric layer. The interconnect structure is located over the interconnect portion. The interconnect structure includes an inner interconnect, a dielectric layer coupled to the inner interconnect, and an outer conductive layer coupled to the dielectric layer. The outer conductive layer is configured to operate as a shield for the inner interconnect.