Interconnect Snoop Transaction Ordering via Reused Tracking Circuitry

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Solution Overview

Problem

The existing interconnects in integrated circuits face challenges in reducing circuit area and performance overhead associated with snoop transactions, particularly when enforcing ordering requirements, which can increase the scale and latency of the snoop filter.

Innovation Solution

Reusing the transaction tracking circuitry within the interconnect to control the ordering of snoop transactions, treating snoop transactions as another type of data access transaction, and utilizing a snoop filter interface to identify cached data, thereby reducing the need for additional tracking circuitry and improving performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a snoop filter is used to identify master devices with cached data, then the number of snoop transactions is reduced, but the circuit area and performance overhead increase

Engineering Contradiction:
Improvenumber of snoop transactionsVSAvoidcircuit area
Core Design Contradiction:
ProductivityVSArea of stationary object

Solution Approach 1:

The transaction tracking circuitry originally designed for data access transactions is made multi-functional by also using it to track and control the ordering of snoop transactions. This allows the same circuitry to serve dual purposes: tracking data access transactions and managing snoop transaction ordering, thereby reducing the need for separate tracking circuitry for snoop transactions and reducing overall circuit area.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges the functionality of tracking data access transactions and tracking snoop transactions into a single transaction tracking circuitry. By combining these tracking functions, the circuit area required for maintaining transaction order information is reduced, as the same circuit structures and logic can be reused for both types of transactions.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If ordering requirements are enforced for data access transactions, then data coherency is maintained, but the scale and latency of the snoop filter increase

Engineering Contradiction:
Improvedata coherencyVSAvoidsnoop filter latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The transaction tracking circuitry maintains order information for snoop transactions in advance, before they are issued to the interconnect. By pre-tracking and pre-ordering snoop transactions using the same circuitry that tracks data access transactions, the system prepares the ordering information beforehand, avoiding the need for additional latency-inducing ordering mechanisms within the snoop filter path.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The same transaction tracking circuitry that ensures ordering of data access transactions is also used to ensure ordering of snoop transactions. This multi-functional use of the circuitry maintains data coherency through proper ordering without requiring separate ordering mechanisms that would increase snoop filter latency.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If additional tracking circuitry is added to control snoop transaction ordering, then transaction ordering is enforced, but device complexity increases

Engineering Contradiction:
Improvetransaction orderingVSAvoidtracking circuitry
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The transaction tracking circuitry is designed to be universal, handling both data access transactions and snoop transactions with the same tracking logic and data structures. This eliminates the need for separate tracking circuitry dedicated solely to snoop transactions, thereby reducing device complexity while maintaining proper ordering enforcement.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent combines the tracking of data access transactions and snoop transactions into a unified tracking system. By merging these previously separate functions into a single circuitry, the overall device complexity is reduced as shared resources and logic can be utilized for both transaction types.

Inventive Principle:
Principle #5Merging (Combining)

4Reliability

If large reorder buffers are used to maintain transaction order, then ordering is preserved, but circuit area increases

Engineering Contradiction:
Improvetransaction orderVSAvoidreorder buffer area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The reorder buffer functionality is merged between data access transactions and snoop transactions. The same buffer structures and management logic are used to maintain order information for both types of transactions, thereby halving the required buffer area compared to having separate buffers for each transaction type.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The reorder buffer is designed as a universal structure that can store and manage order information for any transaction type, whether data access or snoop transactions. This multi-functional buffer reduces the total circuit area required compared to having dedicated reorder buffers for each transaction category.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS9311244B2Enforcing ordering of snoop transactions in an interconnect for an integrated circuit
Publication Date: 2016.04.12 ARM LTD
  • US9311244B2 patent drawing
  • US9311244B2 patent drawing
  • US9311244B2 patent drawing

AI summary

An interconnect has transaction tracking circuitry for enforcing ordering of a set of data access transactions so that they are issued to slave devices in an order in which they are received from master devices. The transaction tracking circuitry is reused for also enforcing ordering of snoop transactions which are triggered by the set of data access transactions, for snooping master devices identified by a snoop filter as holding cache data for the target address of the transactions.