Semiconductor Interconnect Structure via Spacer Double Patterning
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Solution Overview
Problem
Current semiconductor manufacturing techniques face challenges in achieving precise feature sizes due to light scattering at chrome edges in binary masks, and spacer double patterning requires additional masks and costly photolithography steps, limiting cost-effectiveness and feature complexity.
Innovation Solution
A method involving the formation of a mandrel and spacers to create recesses in a base layer, followed by the use of a block mask to etch and fill these recesses with conductive material, allowing for multiple pitch lines without multiple photolithography processes and reducing optical proximity effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If binary masks are used for photolithography, then the manufacturing process is simple, but light scattering at chrome edges causes poor manufacturing precision for small feature sizes
Solution Approach 1:
The patent segments the patterning process into two distinct steps: first forming mandrels with initial photoresist patterns, then forming spacers around these mandrels to create the final interconnect structures. This segmentation allows each step to be optimized independently, achieving both manufacturing simplicity and precision.
Solution Approach 2:
The patent introduces mandrels as intermediary structures that facilitate the formation of spacers. These mandrels serve as temporary placeholders that define the positions of subsequent spacer formations, enabling precise feature placement without requiring complex direct patterning.
2Manufacturing precision
If spacer double patterning is used to achieve precise features, then manufacturing precision improves, but additional masks and photolithography steps increase device complexity and cost
Solution Approach 1:
The patent merges the formation of multiple interconnect structures into a single integrated process sequence. By forming mandrels and then uniformly depositing spacer material around all mandrels simultaneously, the process creates multiple pitch lines in one operation, eliminating the need for separate photolithography steps for each interconnect layer.
Solution Approach 2:
The spacer formation process serves multiple functions: it defines the positions of interconnect structures, establishes precise feature dimensions through controlled deposition thickness, and creates alignment references for subsequent processing steps. This multi-functionality reduces the overall number of required process steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the creation of complex interconnect structures with precise feature sizes and reduced optical proximity effects, improving alignment and cost-effectiveness by eliminating the need for multiple masks and photolithography steps.
Implementation Method 1
The second mask layer is etched selective to the spacers using the block mask as an etch template to remove portions of the mandrel and the second mask layer exposed by the block mask
Implementation Method 2
The first mask layer is etched using the first pattern as an etch template to define a second pattern in the first mask layer
Implementation Method 3
The dielectric layer is etched using the second pattern as an etch template to define recesses therein
Data Source
AI summary
A method for forming an interconnect structure includes forming a mandrel above a base layer, forming spacers on the mandrel, forming recesses in the base layer using the spacers as an etch template, and forming a conductive material in the recesses.