Semiconductor Interconnect Stack for Lower Contact Resistance
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Solution Overview
Problem
The increase in contact resistance between layers and wirings in semiconductor devices due to miniaturization leads to operation delays and increased power consumption, necessitating methods to reduce this resistance.
Innovation Solution
The implementation of an interconnect structure comprising a semiconductor layer with a highly doped region, a conductive metal oxide layer, a semi-metal layer, and a metal layer, optionally with additional metal silicide and carbide layers, to enhance conductivity and reduce contact resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If semiconductor devices are miniaturized to increase integration density, then device integration is improved, but contact resistance between layers and wirings increases
Solution Approach 1:
The patent employs a composite interconnect structure consisting of multiple materials including metal layers, conductive metal oxide layers, and graphene layers. This multi-material approach combines the advantages of each material to achieve both low contact resistance and compatibility with miniaturized device structures, directly resolving the contradiction between integration density and contact resistance.
Solution Approach 2:
The patent introduces highly doped regions in the semiconductor layer with controlled doping concentrations to modify electrical parameters. By changing the doping concentration parameter in specific regions, the contact resistance is reduced while maintaining the miniaturized device structure, thus resolving the contradiction between integration density and contact resistance.
2Loss of energy
If contact resistance is reduced through material and structure optimization, then power consumption decreases, but device complexity increases
Solution Approach 1:
The interconnect structure is segmented into distinct functional layers including metal layers, conductive metal oxide layers, and graphene layers. Each layer performs a specific function in reducing contact resistance, allowing the complex problem of contact resistance reduction to be divided into manageable components that can be optimized independently while working together to reduce power consumption.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed interconnect structure effectively lowers contact resistance, thereby reducing power consumption and increasing the operational speed of semiconductor devices.
Implementation Method 1
an interconnect structure that lowers a contact resistance
Implementation Method 2
a first region having a doping concentration higher than a rest region of the semiconductor layer
Data Source
AI summary
An interconnect structure for reducing a contact resistance, an electronic device including the same, and a method of manufacturing the interconnect structure are provided. The interconnect structure includes a semiconductor layer including a first region having a doping concentration greater than a doping concentration of the rest region of the semiconductor layer, a metal layer facing the semiconductor layer, a semi-metal layer between the semiconductor layer and the metal layer, and a conductive metal oxide layer between the semi-metal layer and the semiconductor and covering the first region.