Interconnect Layer Stack Transfer to Flexible LCP Substrate
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Solution Overview
Problem
The miniaturization of integrated circuits with closely spaced input and output pads poses a challenge for traditional substrate fabrication methods, as they struggle to accommodate flexible printed wiring boards, leading to a gap in interconnection technology and larger package sizes due to the need for additional routing layers or fan-out packaging.
Innovation Solution
A method involving the formation of an interconnect layer stack on a sacrificial substrate with patterned electrical and dielectric layers, followed by lamination and electrical joining with a flexible liquid crystal polymer (LCP) substrate, and subsequent removal of the sacrificial substrate to expose a lowermost conductor layer for device coupling, allowing for the creation of electronic devices with high-density connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If traditional rigid substrate fabrication methods are used, then manufacturing processes are well-established, but the substrate cannot be made flexible and package size increases due to additional routing layers
Solution Approach 1:
The fabrication process is segmented into two distinct phases: first fabricating the interconnect layer stack on a rigid sacrificial substrate using established semiconductor processes, then transferring the completed stack to a flexible LCP substrate. This segmentation allows each substrate type to be optimized for its specific function while maintaining overall system flexibility
Solution Approach 2:
A sacrificial rigid substrate serves as an intermediary medium that enables the fabrication of fine-pitch interconnect structures using mature semiconductor processes, then facilitates transfer to the final flexible LCP substrate. The intermediary substrate temporarily supports the delicate multilevel structure during manufacturing before being removed
2Manufacturing precision
If additional routing layers or fan-out packaging are used, then closely spaced pads can be accommodated, but package size becomes larger than the integrated circuit itself
Solution Approach 1:
The solution moves from planar routing (2D) to three-dimensional vertical interconnection (3D) by fabricating a multilevel interconnect layer stack with multiple conducting layers stacked vertically. This dimensional transition allows closely spaced pads to be connected through vertical vias and multiple routing layers, eliminating the need for lateral fan-out packaging while maintaining fine pitch capability
Solution Approach 2:
The use of thin-film deposition techniques creates highly compact multilevel interconnect structures with precise control over layer thickness and pattern dimensions. The flexible LCP substrate enables the entire assembly to be bent and configured in space-efficient ways, further reducing package footprint while maintaining fine-pitch pad connections
3Volume of moving object
If fine pitch components are fabricated on flexible substrates directly, then system miniaturization is enabled, but traditional semiconductor processing techniques cannot be applied
Solution Approach 1:
The interconnect layer stack is preliminarily fabricated on a rigid sacrificial substrate using well-established semiconductor processing techniques before transfer. This preliminary fabrication on a stable rigid substrate ensures manufacturing precision and process compatibility, while the subsequent transfer step enables final integration on the flexible LCP substrate for miniaturized device applications
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables the formation of electronic devices with fine pitch components on flexible LCP substrates, overcoming the limitations of traditional rigid substrate processing and achieving compact, high-density interconnects without the need for additional routing layers, thus supporting system miniaturization.
Implementation Method 1
biaxially-oriented liquid crystal polymer (LCP). The molecules in LCPs have rigid, rod-like shapes, and maintain a crystalline order when in a liquid phase or when heated and melted
Implementation Method 2
laminating and electrically joining a circuitized liquid crystal polymer (LCP) substrate to the interconnect layer stack
Data Source
AI summary
A method is for making an electronic device and includes forming an interconnect layer stack on a sacrificial substrate and having a plurality of patterned electrical conductor layers, and a dielectric layer between adjacent patterned electrical conductor layers. The method also includes laminating and electrically joining through an intermetallic bond a liquid crystal polymer (LCP) substrate to the interconnect layer stack on a side thereof opposite the sacrificial substrate. The method further includes removing the sacrificial substrate to expose a lowermost patterned electrical conductor layer, and electrically coupling at least one first device to the lowermost patterned electrical conductor layer.