Interconnect Dielectric UV Curing to Prevent Charge-Induced Burnout

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Solution Overview

Problem

The accumulation of electric charge on dielectric materials during the fabrication of semiconductor device structures leads to issues such as under etch and metal line/via burnout, reducing the breakdown voltage and reliability of the insulating structure.

Innovation Solution

Implementing an ultraviolet (UV) curing process to remove electric charge accumulated on dielectric materials after etching processes, using UV light with wavelengths ranging from 200 nm to 400 nm and processing temperatures from 70 to 400 degrees Celsius, without affecting the physical properties of the semiconductor device structure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If etching processes are used to form openings in dielectric layers, then the interconnect structure can be formed, but electric charge accumulates on the dielectric materials causing under etch and metal line/via burnout

Engineering Contradiction:
Improveetch precisionVSAvoidinsulating structure reliability
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent applies UV irradiation to convert the harmful accumulated electric charge on dielectric materials into a beneficial effect by neutralizing the charge. The UV light energy causes charge carriers to recombine, eliminating the harmful electrostatic effects that lead to under etch and metal burnout, while preserving the etched structure integrity

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

The patent introduces a new process parameter (UV irradiation) with specific wavelength ranges (200-400 nm) and dose parameters to change the electrical state of the dielectric material. This parameter change neutralizes the accumulated charge without affecting the physical structure, resolving the contradiction between maintaining etch precision and ensuring reliability

Inventive Principle:
Principle #35Parameter changes

2Productivity

If conventional fabrication processes are used, then manufacturing steps can be completed, but breakdown voltage is reduced due to charge accumulation

Engineering Contradiction:
Improvefabrication throughputVSAvoidbreakdown voltage
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies UV irradiation as a preliminary action between fabrication steps to prevent charge accumulation from affecting subsequent processes. By neutralizing charges early in the process flow, the method maintains both high throughput and reliable breakdown voltage characteristics in the final device

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The UV irradiation process acts as an intermediary step that mediates between the etching/fabrication processes and the final device performance. This intermediate treatment removes harmful charges without disrupting the overall manufacturing flow, preserving both productivity and reliability

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The UV curing process effectively removes electric charge, preventing under etch and reducing the risk of metal line/via burnout, thereby enhancing the breakdown voltage and reliability of the insulating structure.

Implementation Method 1

performing a first ultraviolet (UV) curing process to remove the electric charge accumulated on the insulating structure

Methodology Applied
Scientific EffectUltraviolet (UV) curing: Photopolymerisation

Data Source

PatentUS12463091B2Methods of forming semiconductor device structures
Publication Date: 2025.11.04 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12463091B2 patent drawing
  • US12463091B2 patent drawing
  • US12463091B2 patent drawing

AI summary

Methods of forming a semiconductor device structure are described. In some embodiments, the method includes forming an interconnect structure over a substrate. The forming the interconnect structure over the semiconductor device structure includes forming a dielectric layer, then performing an annealing process, then forming one or more openings in the dielectric layer, then performing a first ultraviolet (UV) curing process, and then forming conductive features in the one or more openings.