Interconnect Via Structure With Relaxed Corner Slope for Void-Free Deposition
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Solution Overview
Problem
Existing semiconductor dice with multi-level interconnect structures face issues such as void formation and electromigration due to sharp transitions between via and interconnect portions, leading to inadequate barrier layer deposition and increased area requirements.
Innovation Solution
A method is introduced to remove a top portion of the etch-stop layer adjacent to the opening in the via ILD layer, creating a more relaxed transition angle, ensuring adequate deposition of barrier and seed layers without gaps or voids, thereby improving electromigration performance and reducing area requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If a sharp transition is used between via and interconnect portions, then the area required is reduced, but void formation and electromigration occur due to inadequate barrier layer deposition
Solution Approach 1:
The etch-stop layer is removed in advance before depositing the barrier and seed layers. This preliminary action creates a relaxed transition angle that ensures adequate material deposition coverage in the transition area, preventing void formation and ensuring proper barrier layer formation to avoid electromigration issues.
2Ease of manufacture
If a sharp 90-degree transition is used between via and interconnect portions, then manufacturing is simpler, but barrier and seed layers cannot be fully formed along sidewalls without gaps or voids
Solution Approach 1:
The etch-stop layer removal is performed as a preliminary step before barrier and seed layer deposition. This creates a relaxed transition angle that allows deposition processes to fully coat the sidewalls without gaps or voids, ensuring complete layer formation while maintaining manufacturing simplicity.
3Reliability
If the transition angle is relaxed to greater than 90 degrees, then barrier and seed layers are fully formed without gaps, but the area occupied by interconnect structures increases
Solution Approach 1:
The etch-stop layer removal is applied locally only at the transition area between via and interconnect portions, not throughout the entire structure. This localized modification creates a relaxed transition angle where needed to ensure proper layer formation, while minimizing the overall area increase of the interconnect structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the formation of barrier and seed layers, reducing voids and improving electromigration performance while minimizing the area needed for interconnect structures, allowing for higher aspect ratio vias and efficient use of back-end layer space.
Implementation Method 1
removing at least a top portion of the etch-stop layer immediately laterally adjacent to the opening with an etch process
Implementation Method 2
forming a barrier layer over the wafer including over surfaces of the first opening and surfaces of the second opening
Data Source
AI summary
Described herein is a process for forming a multi-level interconnect structure formed in a via interlayer dielectric (ILD) layer and in an interconnect interlayer dielectric layer where an etch-stop layer is located between the interconnect ILD layer and the via ILD layer. At least a top portion of the etch-stop layer immediately adjacent to an opening in the etch-stop layer aligned with an opening in the via ILD layer is removed before the formation of the multi-level interconnect structure.