Interconnect Via Sidewall Hydrophobic Coating Against Slurry Leakage

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Solution Overview

Problem

Existing interconnect structures in semiconductor devices face issues with metal loss due to slurry leakage during the planarization process, particularly because the sidewall surfaces are hydrophilic, allowing corrosive agents to penetrate and damage underlying metal layers.

Innovation Solution

A hydrophobic layer is formed on the sidewall surfaces of the via structure using a silane compound and carrier gas mixture, which modifies the surface polarity to prevent slurry leakage and reduce metal loss, combined with surface temperature control and solvent soaking methods during the planarization process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the sidewall surfaces are left hydrophilic (conventional state), then the planarization process can proceed, but slurry leakage occurs and metal loss increases

Engineering Contradiction:

Improvemetal layer integrityVSAvoidslurry leakage

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent changes the surface energy parameter of the sidewall surfaces by forming a hydrophobic coating layer. This coating layer has lower surface energy than the underlying dielectric material, causing the slurry to bead up and roll off rather than wet and penetrate the sidewalls, thereby preventing metal loss during planarization

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The hydrophobic coating layer acts as an intermediary between the slurry and the sidewall surfaces. It provides a protective barrier that prevents direct contact between the corrosive slurry and the metal layers, eliminating the harmful interaction while allowing the planarization process to continue

Inventive Principle:

Principle #24Intermediary (Mediator)

2Reliability

If a hydrophobic coating layer is formed on sidewall surfaces, then slurry leakage is prevented, but the process complexity increases

Engineering Contradiction:

Improveresistance to slurry leakageVSAvoidfabrication process steps

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The hydrophobic coating layer is formed in advance, before the planarization process begins. This preliminary action ensures that the sidewall surfaces are pre-protected against slurry leakage, allowing the subsequent planarization to proceed without damage while maintaining process efficiency

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent uses a thin film hydrophobic coating layer that conformally coats the sidewall surfaces. This thin film approach provides effective protection without adding significant structural complexity or volume, maintaining compatibility with existing interconnect architectures

Inventive Principle:

Principle #30Flexible shells and thin films

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The hydrophobic layer effectively prevents slurry leakage, minimizing metal loss and enhancing the reliability and performance of the semiconductor device structure by maintaining the hydrophobicity of the via structure surfaces.

Implementation Method 1

A hydrophobic layer is formed on sidewall surfaces of the via structure

Methodology Applied

Scientific EffectHydrophobic layer formation through surface modification: Hydrophobe

Implementation Method 2

A hydrophobic layer is formed on the sidewall surfaces of the via structure using a silane compound and carrier gas mixture, which modifies the surface polarity

Methodology Applied

Scientific EffectSurface polarity modification using silane compound: Chemical Bonding

Implementation Method 3

During the planarization process, the surface temperature controlling method and/or the solvent soaking method are optionally performed on the top surface of the via structure

Methodology Applied

Scientific EffectChemical Mechanical Polishing (CMP):

Implementation Method 4

surface temperature control and solvent soaking methods during the planarization process

Methodology Applied

Scientific EffectSurface temperature control: Thermal Insulation

Implementation Method 5

the solvent soaking method are optionally performed on the top surface of the via structure

Methodology Applied

Scientific EffectSolvent soaking: Solvation

Data Source

PatentUS11854872B2Semiconductor device structure with interconnect structure and method for forming the same

Publication Date: 2023.12.26 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A method for forming a semiconductor device structure is provided. The method includes forming a first metal layer over a substrate, forming a dielectric layer over the first metal layer. The method includes forming a trench in the dielectric layer, and performing a surface treatment process on a sidewall surface of the trench to form a hydrophobic layer. The hydrophobic layer is formed on a sidewall surface of the dielectric layer. The method further includes depositing a metal material in the trench and over the hydrophobic layer to form a via structure.