Interconnect Via Structure With Insulating Spacer for Dense Metal Stacks
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Solution Overview
Problem
Existing via structures in microelectronics compromise integration density when attempting to make electrical connections between non-adjacent levels, leading to unwanted contacts and disruptions.
Innovation Solution
A microelectronic device with conductive elements passing through insulating spacers, allowing connections between non-adjacent levels while maintaining integration density, using insulating spacers to isolate conductive elements from adjacent levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If vertical connection elements are formed at a certain distance from access areas to intermediate level devices to avoid unwanted connections, then electrical connection reliability is improved, but integration density is reduced
Solution Approach 1:
The patent introduces an insulating spacer as an intermediary element positioned between the conductive element and the intermediate conductive track. This spacer acts as a mediator that prevents unwanted electrical contact while allowing the conductive element to pass through the intermediate level, thus achieving both reliable electrical connection and maintained integration density
2Quantity of substance
If conductive elements pass through intermediate conductive tracks to connect non-adjacent levels, then integration density is improved, but unwanted electrical contact occurs
Solution Approach 1:
The insulating spacer serves as a protective intermediary that allows the conductive element to pass through the intermediate conductive track without creating harmful electrical contact. The spacer is positioned between the conductive element and the track, enabling the via to traverse multiple levels while selectively making or avoiding contacts as needed
Data Source
Figure 1~4A
Figure 4B~6
Figure 7~8B
AI summary
Implementation of a microelectronic device comprising: - a substrate coated with a stack comprising one or more conductive tracks (106a, 106b, 106c, 106) of a "lower (M1, Mk)" level, this lower level being coated with an "intermediate" insulating layer (113), the intermediate insulating layer being coated with one or more conductive tracks (116a, 116b, 116c, 216) of a "higher (M2, Mk+1)" level, - a conductive element (156b) passing through the intermediate insulating layer (113) and in contact with a first conductive track (106b, 206) of a given level among the higher (M2, Mk+1) and lower (M1, Mk) levels, while being isolated, via an insulating spacer (141e), from a second conductive track (116b, 216) of another level among the lower level and the upper level, the insulating spacer (141e) being disposed between the second conductive track (116b;216) and the conducting element (156b), the conducting element (156b) having a "lower" end (1562) making contact on a first region (102A, 102), conductive or semiconductive of the substrate or stack, the conducting element (156a; 156b) passing through the first conductive track (106b, 206) and the second conductive track (116b, 216) and being surrounded by the insulating spacer (141e).