Interconnect Wire Structure With Flared Sidewalls for Uniform Profiles

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Solution Overview

Problem

The scaling of semiconductor device dimensions leads to dielectric distortion due to stress from alternate metal deposition, resulting in non-uniform interconnect wire structures with varying line profiles and heights, potentially causing shorts between adjacent wires.

Innovation Solution

The technique involves forming interconnect wires with a bottom half and top half having different sidewall orientations, where the bottom half has flared sidewalls and the top half has vertical sidewalls, decoupling their formation to prevent line wiggling and achieve uniform dimensions, using distinct barrier layers and interlayer dielectrics for each half.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If alternate metal deposition is used to reduce line resistance, then line resistance decreases, but dielectric distortion occurs causing non-uniform interconnect structures

Engineering Contradiction:
Improveline resistanceVSAvoidinterconnect structure uniformity
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The interconnect wire is divided into two separate formation processes: bottom half formed by depositing first metal fill material into tapered trenches, and top half formed by depositing second metal fill material and patterning. This segmentation allows each half to be optimized independently, preventing dielectric distortion while maintaining low resistance

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different materials are used for different parts of the interconnect structure: the bottom half uses first metal fill material with flared sidewalls for stress distribution, while the top half uses second metal fill material with vertical sidewalls for precise patterning. Barrier layers with different compositions are also used at different locations to optimize local properties

Inventive Principle:
Principle #3Local quality

2Manufacturing precision

If dielectric template distortion is prevented, then uniform line profile and height are achieved, but process complexity increases

Engineering Contradiction:
Improveline profile uniformityVSAvoidfabrication process steps
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

Tapered trenches are formed in the dielectric before metal deposition, creating a pre-stressed structure that compensates for subsequent deposition stress. The flared sidewalls of the bottom half are formed in advance to provide mechanical support and prevent distortion during top half formation

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The formation process is split into distinct stages: bottom half formation with flared sidewalls, followed by top half formation with vertical sidewalls. This segmentation allows uniform dimensions to be achieved while managing process complexity through systematic step-by-step fabrication

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20240186242A1Wire Structure for Low Resistance Interconnects
Publication Date: 2024.06.06 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US20240186242A1 patent drawing
  • US20240186242A1 patent drawing
  • US20240186242A1 patent drawing

AI summary

Interconnect wire structures and techniques for fabrication thereof with uniform line profile and height are provided. In one aspect, a structure is provided that includes: a wafer; a first interlayer dielectric disposed on the wafer; a second interlayer dielectric disposed on the first interlayer dielectric; and an interconnect wire(s) embedded in the first interlayer dielectric and the second interlayer dielectric, where a first portion of a top half of the interconnect wire(s) has vertical sidewalls, and where a second portion of the top half of the interconnect wire(s) and a bottom half of the interconnect wire(s) have flared sidewalls. A first barrier layer and a (potentially different) second barrier layer can separate the bottom half and top half of the interconnect wire(s) from the first and second interlayer dielectrics. A method for forming the interconnect wire(s) is also provided.