Interconnected Event Counters for Processor Power Throttling
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Integrated circuits face inefficiencies in power management due to separate monitoring mechanisms for thermal design current (TDC) and electrical design current (EDC), requiring separate runs that consume time and resources, necessitating a combined approach.
Innovation Solution
Implementing interconnected event counters and weighted sum accumulators to monitor and adjust power consumption across multiple processing cores, using a single run to compare power usage against both short-term (EDC) and long-term (TDC) thresholds, facilitating power throttling via pulse-width modulation (PWM) or IPC reduction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If separate monitoring mechanisms are used for TDC and EDC, then measurement precision for each constraint is improved, but device complexity and loss of time increase due to requiring separate runs
Solution Approach 1:
The patent combines separate TDC and EDC monitoring mechanisms into a unified power monitoring system that executes a single performance monitoring run. The system integrates event counters and weighted sum accumulators to simultaneously track both thermal and electrical design current constraints, eliminating the need for separate monitoring executions while maintaining measurement precision for both TDC and EDC limits.
Solution Approach 2:
The unified power monitoring system performs multiple functions within a single execution: it monitors both TDC (thermal design current) and EDC (electrical design current) constraints simultaneously, calculates weighted sums for different event types, and enforces both short-term and long-term power limits through one comprehensive monitoring pass rather than requiring separate specialized monitors.
2Measurement precision
If separate runs are executed for TDC and EDC monitoring, then measurement precision is improved, but productivity decreases due to additional time and computing resources consumed
Solution Approach 1:
The patent merges separate TDC and EDC monitoring runs into a single unified performance monitoring execution. The system accumulates weighted event counts for both thermal and electrical constraints simultaneously during one monitoring pass, reducing the total time and computational resources required while preserving the precision needed to enforce both power limits.
3Reliability
If multiple separate monitoring mechanisms are used, then reliability of power constraint enforcement is improved, but device complexity increases
Solution Approach 1:
The patent integrates multiple power constraint enforcement mechanisms into a unified monitoring system that reliably enforces both TDC and EDC limits through a single execution. The system uses interconnected event counters and weighted sum accumulators to simultaneously track and enforce both thermal and electrical design current constraints, maintaining reliability while reducing system complexity.
4Device complexity
If a unified monitoring system is implemented, then device complexity and loss of time are reduced, but measurement precision may be compromised
Solution Approach 1:
The unified monitoring system is segmented into specialized components: event counters for detecting specific events, weighted sum accumulators for calculating power metrics, and separate enforcement logic for TDC and EDC constraints. This segmentation allows the unified system to maintain measurement precision for both thermal and electrical limits while managing complexity through modular architecture.
Solution Approach 2:
Different portions of the unified monitoring system are optimized for their specific functions: event counters are optimized for detecting specific instruction and data events, weighted sum accumulators are optimized for calculating power metrics, and enforcement logic is optimized for respective TDC and EDC constraints. This local optimization maintains measurement precision across the unified system.
Data Source
AI summary
Methods and systems for facilitating improved power consumption control of a plurality of processing cores are disclosed. The methods improve the power consumption control by performing power throttling based on a determined excess power consumption. The methods include the steps of: monitoring using at least one event count component in the respective processing core a plurality of distributed events; calculating an accumulated weighted sum of the distributed events from the event count component; determining an excess power consumption by comparing the accumulated weighted sum with a threshold power value; and adjusting power consumption of the respective processing core based on the determined excess power consumption.