Interconnection Current Level Extraction for EOS Cutoff Prevention

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Solution Overview

Problem

Current methods fail to effectively prevent cutoff failures in semiconductor integrated circuit devices due to electrical over stress (EOS), which causes thermal migration and interconnection failure, as they do not accurately determine the maximum current level that triggers such failures.

Innovation Solution

A method involving voltage sweeping of interconnection structures at specific temperatures to measure resistance and current levels, comparing initial and subsequent resistance ratios or current differences to set the maximum current level, thereby controlling current provision to prevent EOS-induced cutoffs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If voltage sweeping is performed to measure resistance and determine maximum current level, then the precision of determining maximum current level is improved, but the complexity of the measurement process increases

Engineering Contradiction:
Improvemaximum current level determinationVSAvoidmeasurement process
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent performs preliminary voltage sweeping to measure resistance characteristics before determining the maximum current level. By pre-measuring the resistance at various voltage levels and establishing the resistance ratio threshold in advance, the system prepares the necessary data and criteria beforehand, enabling accurate determination of the maximum current level without requiring complex real-time analysis during actual operation.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If resistance measurement is repeated multiple times during voltage sweeping, then the accuracy of identifying the maximum current level is improved, but the time required for measurement increases

Engineering Contradiction:
Improvecurrent level identificationVSAvoidmeasurement time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent implements a feedback mechanism where each resistance measurement during voltage sweeping is immediately compared against the previously measured initial resistance to calculate the resistance ratio. When the resistance ratio exceeds the predetermined threshold, the system immediately identifies this as the maximum current level and terminates further measurements. This feedback loop enables accurate identification while minimizing unnecessary repeated measurements and reducing overall measurement time.

Inventive Principle:
Principle #23Feedback

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method effectively reduces EOS-induced cutoffs by accurately determining and controlling the maximum current level, thereby minimizing thermal migration and interconnection failures in semiconductor devices.

Implementation Method 1

EOS may cause thermal migration in semiconductor integrated circuit devices resulting in cutoff of interconnections

Methodology Applied
Scientific EffectThermal migration: Diffusion

Implementation Method 2

measuring a resistance of the interconnection structure according to a corresponding voltage input in the voltage sweeping

Methodology Applied
Scientific EffectElectrical resistance measurement: Electrical Resistance

Data Source

PatentUS10444265B2Method of extracting a current level for relating to the cutoff of an interconnection
Publication Date: 2019.10.15 SK HYNIX INC
  • US10444265B2 patent drawing
  • US10444265B2 patent drawing
  • US10444265B2 patent drawing

AI summary

A current level extraction method for preventing cutoff is disclosed. The method may include starting a voltage sweep to an interconnection structure at a certain temperature, measuring an initial resistance of the interconnection structure, calculating a measured resistance of the interconnection structure according to a corresponding input voltage, determining whether or not a resistance ratio of the measured resistance of the interconnection structure to the initial resistance is equal to or less than a preset value, updating a current value corresponding to measured resistance to a potential maximum current level and repeating the step of calculating the measured resistance when the resistance ratio of the interconnection structure is equal to or less than the preset value, and setting the current value corresponding to the measured resistance as a maximum current level when the resistance ratio of the interconnection structure is greater than the preset value.