Interconnection Structure for High Decoupling in RF Analog Circuits
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current interconnection structures in integrated circuits face challenges in achieving high metal density and effective capacitive decoupling for RF analog circuits, particularly in distributing multiple signals while adhering to design rules and optimizing parasitic capacitance.
Innovation Solution
An interconnection structure comprising an alternating stack of conductive lines and dielectric layers, where conductive lines form equipotential networks with specific patterns and via configurations to maximize decoupling capacity and metal density, allowing for the distribution of multiple signals with reduced series impedances and increased common mode decoupling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conductive lines are arranged in a grid pattern with parallel orientation in each level and perpendicular orientation between levels, then parasitic capacitances are formed between levels distributing different signals, but metal density is limited and decoupling capacity is insufficient for RF analog circuits
Solution Approach 1:
The patent transitions from two-dimensional planar grid patterns to three-dimensional stacked patterns where conductive lines in different levels are vertically aligned. This dimensional change allows conductive lines to extend through multiple levels, increasing metal density while creating stronger parasitic capacitances for improved decoupling capacity in RF analog circuits.
Solution Approach 2:
The patent merges multiple functions into the same conductive lines by making them extend vertically through multiple levels. The same conductive lines simultaneously serve as signal distribution paths and as decoupling capacitor plates, eliminating the need for separate dedicated decoupling structures and thereby increasing metal density.
2Quantity of substance
If continuous conductive planes are produced to increase metal density, then decoupling capacity improves, but design rules for recent integrated circuit manufacturing processes are violated
Solution Approach 1:
The patent segments continuous conductive planes into discrete conductive lines arranged in specific patterns. By using multiple stacked patterns of conductive lines rather than continuous planes, the design achieves high metal density while complying with manufacturing design rules that prohibit continuous planes in certain layers.
Solution Approach 2:
The patent compensates for the discontinuity in individual layers by extending conductive lines vertically into the third dimension. The stacked patterns create an effective continuous structure when viewed in three dimensions, achieving the benefits of continuous planes while maintaining compliance with two-dimensional design rules for each layer.
3Ease of manufacture
If conductive lines are spaced apart to form meshes instead of continuous planes, then design rules are followed, but metal density decreases and decoupling capacity is reduced
Solution Approach 1:
The patent uses vertical stacking of mesh patterns to increase metal density. By extending conductive lines through multiple levels in the vertical dimension, the effective metal density increases even though each individual layer maintains the spaced-apart mesh structure required by design rules.
Solution Approach 2:
The patent nests multiple mesh patterns from different levels within the same vertical space. The conductive lines from different levels are positioned to overlap or align, creating a nested configuration that increases the effective metal density without violating the spacing requirements of any single layer.
4Adaptability or versatility
If multiple signals are distributed through the interconnection structure, then versatility improves, but parasitic capacitance optimization becomes more difficult and decoupling effectiveness decreases
Solution Approach 1:
The patent applies different stacking patterns to different regions of the interconnection structure. By locally optimizing the vertical alignment of conductive lines in specific areas, the design achieves effective decoupling for multiple simultaneously distributed signals, with each region tailored to its specific signal distribution requirements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This structure enables efficient distribution of DC and low-frequency signals with high stability, meeting design rule metal densities and providing strong decoupling between ground and supply signals, while increasing capacitive coupling and decoupling capacity.
Implementation Method 1
the conductive lines of two consecutive interconnection levels are oriented perpendicular to each other to form parasitic capacitances between the levels distributing different signals, and therefore to form decoupling capacitances between these signals
Implementation Method 2
An inter-layer dielectric material (ILD for 'InterLayer Dielectric') is arranged between two levels of neighboring or successive metallic interconnections
Data Source
Figure 1~2
Figure 3~4
Figure 5A~5D
AI summary
Electronic device (100) comprising an interconnection structure (102) having an alternating stacking of networks of conducting lines (108, 112, 116) and dielectric layers (106, 110, 114, 118) in which: - all the lines of a single network extend in the same plane and form an equipotential; - a first pattern of a first network is such that the lines of the first network cross at several intersections (120); - a third pattern of a third network is similar to, superimposed on, and aligned with the first pattern; - a second pattern of a second network arranged between the first and third networks is such that the lines of the second network cross at several intersections (122) offset from those of the first and third patterns; - a first conducting via (126) extends from a line of the first and/or third network and is not in contact with the second network.