Interconnection Structure Layout for Hybrid-Height Metal Lines

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Solution Overview

Problem

Current direct metal etch approaches are inadequate for efficiently and reliably forming interconnection levels with hybrid-height metal lines in semiconductor circuit fabrication, as they struggle to combine metal lines of different heights effectively.

Innovation Solution

A method involving the formation of multiple dielectric and metal layers with specific patterning and etching processes, using a mask pattern to create metal features of varying heights, allowing for the formation of hybrid-height metal features such as lines, pillars, or arbitrary 2D layouts by etching the stacked metal layers, enabling the creation of interconnection structures with lower, upper, and stacked metal features.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If direct metal etch approaches are used to form interconnection levels, then lithography and etching can be employed to pattern metal lines, but the ability to efficiently and reliably form hybrid-height metal lines is insufficient

Engineering Contradiction:
Improveability to form hybrid-height metal linesVSAvoidreliability of forming interconnection level
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The metal interconnection level is divided into multiple separate metal layers (first metal layer pattern and second metal layer pattern) with different dielectric layers between them. This segmentation allows each metal layer to be formed and patterned independently, enabling the creation of hybrid-height metal lines where different portions have different heights while maintaining reliable formation processes for each layer.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If multiple metal layers are formed with different heights, then complex interconnection structures can be created, but the process complexity increases

Engineering Contradiction:
Improveformation of complex interconnection structuresVSAvoidprocess complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

Dielectric layers are formed and patterned in advance before metal deposition, creating pre-defined regions that guide subsequent metal layer formation. The first dielectric layer pattern and second dielectric layer pattern are prepared beforehand with specific configurations, allowing metal layers to be deposited and patterned in a more straightforward manner, thereby managing process complexity while enabling complex interconnection structures.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The solution transitions from forming metal lines in a single plane to creating metal layers at different vertical levels (first metal layer pattern and second metal layer pattern separated by dielectric layers). This dimensional approach allows complex interconnection structures to be built by stacking simpler layers, managing overall process complexity through vertical organization.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Productivity

If conventional approaches are used, then standard fabrication processes can be maintained, but the efficiency of forming hybrid-height metal features is reduced

Engineering Contradiction:
Improveefficiency of forming hybrid-height metal featuresVSAvoidease of forming interconnection structure
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The dielectric layers are configured to self-align and define the boundaries for metal layer formation. The first dielectric layer pattern and second dielectric layer pattern automatically establish the regions where metal will be deposited, eliminating the need for separate alignment and patterning steps for each metal layer, thereby improving efficiency while maintaining ease of manufacture.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS20240170328A1Method for Forming an Interconnection Structure
Publication Date: 2024.05.23 INTERUNIVERSITAIR MICRO ELECTRONICS CENT (IMEC VZW)
  • US20240170328A1 patent drawing
  • US20240170328A1 patent drawing
  • US20240170328A1 patent drawing

AI summary

A method includes forming and patterning a first dielectric over a substrate; covering the first dielectric with metal and planarizing the metal exposing a surface of the first dielectric and forming a first metal; forming a second dielectric over the first dielectric and the first metal; covering the second dielectric with metal and planarizing the metal exposing a surface of the second dielectric and forming a second metal; forming a mask over the second dielectric and the second metal; and transferring: a first sub-pattern of the mask into a first portion of the first metal to form a lower metal, a second sub-pattern of the mask into a first portion of the second metal and a second portion of the first metal to form a stacked metal, and a third sub-pattern of the mask into a second portion of the second metal to form an upper metal.