Interconnection Levels Porous Dielectric Stray Capacitance
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Solution Overview
Problem
The miniaturization of integrated circuits and increasing operating frequencies lead to increased stray capacitances due to the porosity of dielectric materials, causing diffusion of conductive materials and contamination, which affects the reliability and efficiency of interconnection levels.
Innovation Solution
A method involving the formation of non-porous insulating layers with openings above porous dielectric materials to prevent diffusion and contamination, followed by an annealing process to evacuate contaminants, which maintains the integrity of the dielectric material and reduces stray capacitances.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If porous dielectric material is used to reduce stray capacitances, then stray capacitances decrease, but conductive material diffusion increases
Solution Approach 1:
A non-porous insulating layer is introduced as an intermediary between the porous dielectric material and the conductive tracks. This intermediate layer acts as a barrier that prevents copper diffusion into the porous dielectric while allowing the porous material to maintain its low-k properties for reducing stray capacitances.
Solution Approach 2:
The patent uses a composite structure combining porous dielectric material (for low stray capacitance) with non-porous insulating material (for diffusion barrier). This composite approach allows both functionalities to coexist: the porous regions provide electrical isolation with low capacitance, while the non-porous regions provide diffusion protection.
2Loss of energy
If porous dielectric material is used, then stray capacitances decrease, but contamination increases
Solution Approach 1:
The non-porous insulating layer serves as a protective intermediary that shields the porous dielectric material from contamination during manufacturing processes. Contaminants are blocked by the non-porous layer and can be removed through openings in the annealing step, while the porous material remains protected.
Solution Approach 2:
The non-porous insulating layer is formed beforehand to prevent contamination from entering the porous dielectric material during subsequent manufacturing steps. This preliminary protective action ensures the porous material remains clean before final annealing.
3Object-affected harmful factors
If annealing is performed to remove contaminants, then contamination decreases, but material expansion occurs
Solution Approach 1:
The non-porous insulating layer acts as a constraint that prevents the porous dielectric material from expanding during annealing. The layer restricts the movement and expansion of the porous material while still allowing contaminants to be evacuated through the openings.
Solution Approach 2:
The non-porous insulating layer is strategically placed in specific locations (above the porous dielectric material and crossed by vias) to provide localized constraint during annealing, preventing expansion only where needed while maintaining contamination removal pathways.
4Productivity
If conventional etch and polishing operations are performed, then manufacturing progresses, but contamination of porous material increases
Solution Approach 1:
The non-porous insulating layer serves as a protective barrier during conventional etching and polishing operations. Liquid and gas phase contaminants used in these processes are blocked by the non-porous layer, preventing them from penetrating into the porous dielectric material while allowing the manufacturing operations to proceed.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces stray capacitances, maintains the reliability of interconnection levels, and allows for higher annealing temperatures without material expansion, thereby improving the manufacturing process of integrated circuits.
Implementation Method 1
so-called 'low-k' dielectric materials having very low relative permittivities, typically smaller than 3, are used between the different conductive portions
Implementation Method 2
A way to restore the characteristics of the porous material comprises performing, after having formed each interconnection level, an anneal to eliminate the contaminating products present in the porous dielectric material
Implementation Method 3
it is particularly useful to form, between two neighboring interconnection levels, a layer 16 which, conventionally, stops the diffusion of conductive material from an interconnection level to the dielectric material of the upper interconnection level
Data Source
AI summary
A method for forming interconnection levels of an integrated circuit, including the steps of: (a) forming an interconnection level comprising conductive tracks and vias separated by a porous dielectric material; (b) forming, on the interconnection level, a layer of a non-porous insulating material, said layer comprising openings above portions of porous dielectric material; (c) repeating steps (a) and (b) to obtain the adequate number of interconnection levels; and (d) annealing the structure.