Interconnection Module Substrate for Mixed Electrode Pitches
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Solution Overview
Problem
Existing semiconductor package substrates face challenges in accommodating different electrode pitches, are difficult to manufacture, and lack durability due to deformation, making them unsuitable for various design implementations.
Innovation Solution
An interconnection module substrate with via-defining structures and interconnection bridge members, embedded in a substrate material layer, allowing for flexible design and manufacturing to accommodate various electrode pitches, ensuring responsiveness and durability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If a silicon bridge is used in EMIB technology to connect heterogeneous semiconductor chips, then board area and package height are reduced and power consumption is lowered, but the substrate cannot accommodate chips with different electrode pitches and pattern resolution differences
Solution Approach 1:
The substrate is divided into multiple regions with different substrate material units having different dielectric constants. This segmentation allows each region to be optimized for specific electrode pitch requirements, enabling the substrate to accommodate chips with varying electrode pitches while maintaining compact form factor.
Solution Approach 2:
Different regions of the substrate are assigned different material properties (dielectric constants) based on local requirements. Areas with smaller electrode pitches use substrate material units with lower dielectric constants, while areas with larger pitches use units with higher dielectric constants, optimizing performance for each local region.
2Length of stationary object
If a silicon bridge is used in EMIB technology, then package height is reduced, but the substrate lacks durability due to deformation
Solution Approach 1:
The substrate employs composite material units with different dielectric constants and mechanical properties in different regions. This composite structure provides both the low profile required for reduced package height and the mechanical strength needed to prevent deformation, achieving both compactness and durability.
3Reliability
If a silicon bridge is used in EMIB technology, then connectivity between chips is improved, but the substrate is difficult to manufacture and adapt for various semiconductor package designs
Solution Approach 1:
The substrate design with variable dielectric constant regions provides universal applicability across different semiconductor package designs and electrode pitch configurations. A single substrate type can be used for multiple chip configurations, simplifying manufacturing processes and inventory management while maintaining excellent connectivity.
4Adaptability or versatility
If traditional substrates are used to accommodate different electrode pitches, then responsiveness to various pitches is achieved, but the substrate becomes complex and difficult to manufacture
Solution Approach 1:
Instead of using a uniformly complex substrate structure, the invention segments the substrate into regions with different dielectric constants. This segmentation achieves the necessary adaptability for various electrode pitches while maintaining a relatively simple overall structure that is easier to manufacture compared to traditional approaches.
Data Source
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AI summary
Disclosed are an interconnection module substrate for a semiconductor package, a semiconductor package device including the same, and manufacturing methods thereof. The interconnection module substrate includes a plurality of via-defining structures disposed spaced apart from each other in a horizontal direction, each of the plurality of via-defining structures including a substrate material unit and a conductive via element extending through the substrate material unit in a vertical direction, at least one interconnection bridge member disposed spaced apart from or adjacent to the plurality of via-defining structures in the horizontal direction, and a substrate material layer embedded in the space between and around the plurality of via-defining structures and the interconnection bridge member to form a single substrate shape together therewith, the substrate material layer being configured to expose the plurality of via-defining structures and the interconnection bridge member.