Interdigitated Capacitor Structure for DRAM Capacitance Scaling
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Solution Overview
Problem
Current capacitor designs in DRAM devices face limitations in increasing capacitance beyond the enhancement achieved by using high-k dielectric materials, necessitating a new approach to enhance capacitance without relying solely on dielectric constant increases.
Innovation Solution
The proposed capacitor structure incorporates multiple conductive patterns and dielectric structures arranged in a specific configuration, with interdigitated electrodes and varying dielectric patterns, allowing for increased capacitance through parallel connections and optimized dielectric stack structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high-k dielectric materials are used to increase capacitance, then the dielectric constant increases and capacitance improves, but the approach reaches a limit and cannot provide further capacitance enhancement
Solution Approach 1:
The capacitor is divided into multiple sub-capacitors (first capacitor with first lower electrode, first upper electrode, and first dielectric structure; second capacitor with second lower electrode, second upper electrode, and second dielectric structure) that are connected in parallel. This segmentation allows the total capacitance to be the sum of individual capacitances, enabling continued capacitance enhancement beyond the limits of single high-k dielectric materials.
Solution Approach 2:
Multiple capacitor units are combined in parallel configuration within a single capacitor structure. The first and second capacitors share common conductive patterns (first lower conductive pattern and first upper conductive pattern) while maintaining electrical parallel connection through the insulating structure. This merging of multiple capacitance elements achieves enhanced total capacitance that overcomes the limitations of individual high-k dielectric approaches.
2Reliability
If multiple capacitors are integrated into a single structure, then capacitance is enhanced through parallel connections, but the device complexity increases
Solution Approach 1:
The common first lower conductive pattern and first upper conductive pattern serve multiple functions: they act as electrodes for both the first and second capacitors simultaneously, and provide electrical connection points for the parallel configuration. This multi-functionality reduces the number of separate components needed, thereby reducing overall structural complexity while maintaining enhanced capacitance through parallel connection of multiple capacitor units.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively enhances capacitance by allowing for the summation of electric capacitances from multiple capacitors, enabling multi-level bit storage and improved performance in DRAM devices.
Implementation Method 1
Each of the first dielectric structures is disposed between one of the first lower electrodes and a corresponding one of the first upper electrodes
Implementation Method 2
The capacitance of the capacitor may increase
Data Source
Figure 1
Figure 2~3
Figure 4
AI summary
A capacitor structure includes a first lower conductive pattern, a first capacitor, a first upper conductive pattern, a second lower conductive pattern, a second capacitor and a second upper conductive pattern. The first capacitor includes first lower electrodes, first upper electrodes and first dielectric structures. Each of the first dielectric structures are disposed between one of the first lower electrodes and a corresponding one of the first upper electrodes. The first upper conductive pattern is formed on and is electrically connected to the first upper electrodes. The second lower conductive pattern is spaced apart from the first lower conductive pattern disposed on the substrate. The second capacitor includes second lower electrodes, second upper electrodes and second dielectric structures. The second upper conductive pattern is formed on and is electrically connected to the second upper electrodes. The first and second conductive patterns are electrically insulated from each other.