Interdigitated Hinged Edge Interconnects for Quilt Packaging
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Solution Overview
Problem
Current microchip packaging technologies, such as Quilt Packaging, face limitations in further increasing integration and functionality without sacrificing performance or increasing costs, particularly in achieving customized chip-to-chip alignment and mechanical stability for diverse component integration.
Innovation Solution
The development of a quilt packaging system where microchip substrates are hingedly connected via interdigitated quilt package nodules, allowing for customized geometries and mechanical stability through interdigitated fingers and nodules that can be soldered or connected via mechanical friction, enabling non-planar assemblies and varied chip configurations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional Quilt Packaging with solid metal contacts is used, then electrical interconnection is achieved, but mechanical stability and customized alignment are limited
Solution Approach 1:
The solid metal contact is segmented into multiple fingers that can independently deflect and engage. This segmentation allows the interconnect structure to provide both mechanical support and electrical connection while enabling customized alignment through selective finger engagement, resolving the contradiction between mechanical stability and alignment versatility.
Solution Approach 2:
The interdigitated fingers are designed with elastic properties allowing dynamic deflection during assembly. This dynamic behavior enables the structure to accommodate misalignment and achieve stable mechanical engagement, simultaneously providing mechanical stability and adaptability for customized alignment configurations.
2Productivity
If more microchips are integrated in a quilt pattern, then functionality increases, but assembly complexity and alignment precision requirements increase
Solution Approach 1:
The elastic finger design allows dynamic adjustment during assembly, enabling multiple chips to be integrated with tolerance for alignment variations. This reduces the manufacturing precision requirements while maintaining high integration capability, as the fingers can deflect to accommodate minor misalignments in quilt patterns.
Solution Approach 2:
The interdigitated finger structure provides self-aligning and self-adjusting capabilities during assembly. The elastic fingers automatically engage with complementary fingers from adjacent chips, enabling high integration without requiring extremely precise alignment, thus reducing manufacturing complexity.
3Strength
If interconnect nodules protrude over chip edges, then mechanical fastening and alignment are improved, but chip geometry constraints increase
Solution Approach 1:
The interconnect structure extends from the chip edge surface into a third dimension, creating protruding fingers that provide mechanical fastening capability. This dimensional extension allows strong mechanical attachment without constraining the planar chip geometry, as the interconnection occurs in the vertical dimension while chip layout remains flexible.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances integration capabilities, allowing for increased functionality and customized alignment of microchips with diverse technologies and substrate materials, while maintaining performance and cost-effectiveness by providing both mechanical stability and electrical connections.
Implementation Method 1
The fingers of the first and second interconnecting structures can be soldered or otherwise mechanically connected together
Implementation Method 2
The fingers of the first and second interconnecting structures can be soldered or otherwise mechanically connected together
Data Source
AI summary
A quilt packaging system includes a first microchip substrate having a first edge surface which includes a first conductive interconnecting structure disposed thereon and a second microchip substrate having a first edge surface which includes a second conductive interconnecting structure disposed thereon. The first conductive interconnecting structure is hingedly connected in an interdigitated manner with the second conductive interconnecting structure at an angle that is not a straight angle.