Interdigitated Semiconductor Fins for High-Density Chip Communication

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Solution Overview

Problem

There is a need to increase the surface area of contact between adjacent semiconductor chips to enhance communication between them without enlarging the chips themselves.

Innovation Solution

The solution involves arranging semiconductor chips on a wafer with protruding sections that interdigitate, allowing for increased interconnect locations and potentially including peripheral component interconnects (PCI) or a bridge to facilitate higher communication efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the surface area of contact between adjacent semiconductor chips is increased to enhance communication, then communication efficiency is improved, but the chip size must be enlarged

Engineering Contradiction:
Improvecommunication efficiencyVSAvoidchip size
Core Design Contradiction:
ReliabilityVSArea of moving object

Solution Approach 1:

The patent applies dimensionality change by extending the contact interface from a two-dimensional planar surface to a three-dimensional structure using protruding sections (fins) that extend vertically from the chip surface. This allows increasing the effective contact area without enlarging the chip's footprint, thereby improving communication efficiency while maintaining compact chip dimensions.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The chip surface is segmented into multiple protruding sections (fins) that are distributed across the chip surface. This segmentation increases the total surface area available for contact and communication with adjacent chips, allowing enhanced communication without requiring a single large contact area that would increase overall chip size.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If protruding sections are added to increase interconnect locations, then communication capability is enhanced, but device complexity increases

Engineering Contradiction:
Improvecommunication capabilityVSAvoidstructure complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent merges multiple functions into the protruding sections: they serve as both mechanical interconnect structures for electrical connections and as extended surface area for thermal management. This consolidation enhances communication capability while avoiding the need for separate complex structures for each function, thereby limiting the increase in device complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The protruding sections are designed to perform multiple functions simultaneously: providing electrical interconnects for communication, increasing surface area for thermal dissipation, and serving as mechanical attachment points. This multi-functionality enhances communication capability without proportionally increasing device complexity, as the same structural elements fulfill multiple roles.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11031343B2Fins for enhanced die communication
Publication Date: 2021.06.08 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US11031343B2 patent drawing
  • US11031343B2 patent drawing
  • US11031343B2 patent drawing

AI summary

Semiconductor structures are provided in which a first chip on a substrate has at least one first protruding section, the first protruding section including first interconnect locations, a second chip on the substrate having at least one second protruding section, the second protruding section including second interconnect locations and the first chip and the second chip are arranged such that the first protruding section is interdigitated with the second protruding section.