Interface Circuit Test Mode Initiation via Voltage Comparator
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Solution Overview
Problem
The manufacturing of electronic devices with integrated circuits faces challenges in testing without dedicating additional inputs or outputs for test modes, which increases manufacturing costs and reduces real estate for other features.
Innovation Solution
An interface circuit that detects accessories and processes information between a processor and an accessory, allowing for test modes to be initiated without dedicated terminations, using a ripple counter to sense voltage transitions and determine test mode initiation based on bit patterns, thus conserving physical space and reducing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dedicated test mode inputs or outputs are added to the interface circuit, then testing capability is improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The existing interface circuit pins are made multi-functional by adding test mode capability. The same pins used for normal accessory interfacing are also used for testing when test mode is activated, eliminating the need for dedicated test pins and reducing device complexity while maintaining testing capability
Solution Approach 2:
The circuit operates in different functional states (normal mode vs. test mode) by changing operational parameters. A mode selection mechanism switches the circuit between its standard interfacing function and testing function, allowing the same hardware to serve multiple purposes without adding complexity
2Reliability
If dedicated test mode inputs or outputs are added to the interface circuit, then testing capability is improved, but manufacturing cost increases
Solution Approach 1:
The interface circuit is designed to perform both normal accessory interfacing and testing functions using the same physical pins and circuitry. This multi-functionality reduces the bill of materials and assembly complexity, directly lowering manufacturing costs while maintaining full testing capability
Solution Approach 2:
The testing function is merged with the existing interface circuit rather than being implemented as a separate dedicated test circuit. By combining both functions into a single circuit design, manufacturing steps are reduced and production costs are lowered
3Reliability
If additional inputs or outputs are provided for test mode, then testing capability is improved, but real estate for other features is reduced
Solution Approach 1:
The interface circuit pins serve dual purposes: normal accessory communication during device operation, and testing during manufacturing. This eliminates the need for additional dedicated test pins that would consume valuable chip real estate, as the same pins are reused for both functions at different times
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables efficient testing of interface circuits without additional physical inputs or outputs, reducing manufacturing costs and conserving resources, while allowing for timely and effective observation of circuit behavior.
Implementation Method 1
a voltage comparator configured compare a first voltage to a second voltage
Implementation Method 2
a ripple counter configured to count pulses from a processor when the voltage comparator indicates that the first voltage is greater than the second voltage
Data Source
AI summary
This application provides apparatus and methods for initiating tests in an interface circuit without using inputs of the interface circuit dedicated to initiating the tests. In an example, a test mode interface circuit can include a voltage comparator configured compare a first voltage to a second voltage, a ripple counter configured to count pulses from a processor when the voltage comparator indicates that the first voltage is greater than the second voltage, and wherein the test mode interface circuit is configured to provide a test mode enable signal and an indication of the a desired test mode an interface circuit that includes the test mode interface circuit.