Interface Controller Wear-Leveling for Non-Volatile Memory Banks
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Solution Overview
Problem
Non-volatile memory cells in memory systems wear down due to repeated access, reducing their endurance, and existing wear-leveling procedures often render memory banks inaccessible during the process, increasing latency and impacting system performance.
Innovation Solution
Implementing a wear-leveling procedure in multiple phases, where data is read from one row and written to another, allowing the interface controller to service data requests during the process by separating read and write operations, thereby keeping other rows in the bank accessible.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If wear-leveling procedures are implemented in non-volatile memory, then memory cell endurance is improved, but memory bank accessibility deteriorates during the procedure
Solution Approach 1:
The wear-leveling procedure is divided into separate phases (read phase and write phase) that can be executed independently and interleaved with data requests. This segmentation allows different parts of the memory bank to be accessed during different phases, improving overall accessibility while maintaining wear-leveling benefits.
Solution Approach 2:
The memory system dynamically switches between servicing data requests and executing wear-leveling operations based on phase state. The interface controller adapts its behavior to allow data requests during idle periods between wear-leveling phases, making the system flexible and responsive rather than statically blocking access.
2Reliability
If wear-leveling procedures are implemented in non-volatile memory, then memory cell endurance is improved, but system latency increases
Solution Approach 1:
The system maintains continuous useful action by allowing data requests to be serviced during the read phase of wear-leveling operations. This ensures that the memory system remains productive and responsive throughout the entire wear-leveling process, rather than having idle periods where no useful work is being performed.
Solution Approach 2:
The wear-leveling procedure is implemented as periodic, interleaved operations rather than continuous blocking processes. By periodically switching between wear-leveling phases and data request servicing, the system achieves wear-leveling goals while maintaining low latency through regular intervals of normal operation.
3Reliability
If wear-leveling procedures are implemented in non-volatile memory, then memory cell endurance is improved, but system performance deteriorates
Solution Approach 1:
By segmenting the wear-leveling procedure into distinct read and write phases, the system can interleave data requests with wear-leveling operations. This segmentation prevents performance deterioration by ensuring that wear-leveling does not completely block productive data access operations.
Solution Approach 2:
The interface controller acts as an intermediary that manages both wear-leveling operations and data requests. It coordinates these competing demands by allowing data requests to proceed during appropriate phases of wear-leveling, thus maintaining system performance while achieving wear-leveling goals.
Data Source
AI summary
Methods, systems, and devices for memory wear management are described. A device may include an interface controller and a non-volatile memory. The interface controller may manage wear-leveling procedures for memory banks in the non-volatile memory. For example, the interface controller may select a row in a memory bank for the wear-leveling procedure. The interface controller may store data from the row in a buffer in the interface controller. The interface controller may then transfer the data to the non-volatile memory so that the non-volatile memory can write the data to a second row of the memory bank.