Interface Circuit Frequency Scaling for Priority-Aware Workloads
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Solution Overview
Problem
Adjusting the frequency of operation of circuitry that provides interfaces to other components in SoCs can disrupt communication paths, I/O operations, and core-to-core communications, impacting performance indicators like latency and packet loss, particularly when lower priority processes are adjusted, affecting higher priority workloads.
Innovation Solution
A utilization-based and priority-based control mechanism for interface circuitry frequency adjustment, considering processor utilization levels and requester priority to avoid performance disruptions, ensuring higher priority processes are not negatively impacted.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the frequency of operation of interface circuitry is reduced to save power, then power consumption is reduced, but performance indicators like latency and packet loss deteriorate
Solution Approach 1:
The interface circuitry frequency is dynamically adjusted based on real-time processor utilization levels and process priorities. The frequency scaling mechanism transitions between different frequency states (e.g., high, medium, low) depending on system conditions, allowing the circuitry to operate at optimal performance when needed and at reduced power consumption when idle.
Solution Approach 2:
The patent changes the operating frequency parameter of the interface circuitry based on processor utilization thresholds and process priority levels. By monitoring utilization metrics and adjusting frequency accordingly, the system achieves power savings during low-utilization periods while maintaining performance during high-demand periods.
2Loss of energy
If frequency adjustment is applied to lower priority processes, then power consumption is reduced, but higher priority workloads are negatively impacted
Solution Approach 1:
The frequency adjustment mechanism acts as an intermediary between power saving goals and performance requirements. By considering both processor utilization levels and process priority levels as intermediate factors, the system determines appropriate frequency adjustments that balance power consumption with the performance needs of different workloads.
Solution Approach 2:
Different frequency adjustment strategies are applied to different processes based on their priority levels. High priority processes maintain higher frequency operations to ensure performance, while low priority processes experience frequency reductions for power savings. This localized quality approach ensures that frequency scaling does not uniformly impact all processes equally.
3Device complexity
If frequency scaling is implemented without considering process priority, then implementation complexity is reduced, but performance disruptions occur
Solution Approach 1:
The frequency adjustment mechanism serves multiple functions simultaneously: it monitors processor utilization, considers process priority levels, and adjusts frequency accordingly. This multi-functional approach, while increasing some control logic complexity, ensures reliable performance by coordinating multiple factors into a unified frequency scaling strategy.
Data Source
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AI summary
Examples described herein relate to circuitry to: monitor utilization data for a plurality of processes; determine one or more priority levels associated with at least one of the plurality of processes based on policy parameters; and adjust a frequency of operation of the interface circuitry based on the monitored utilization data and the determined priority levels of the processes. In some examples, adjust the frequency of operation of the interface circuitry is to prioritize frequency of operation requested by a higher priority workload over a frequency of operations requested by a lower priority workload.