Interface Layer Formation in Two-Terminal Memory via N2O Plasma

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Solution Overview

Problem

Current semiconductor manufacturing processes face challenges in controlling the thickness and composition of interface layers in two-terminal memory cells, particularly in resistive-switching memory technology, which affects the reliability and efficiency of memory devices due to issues like active metal contamination and compatibility with CMOS architectures.

Innovation Solution

The use of nitrogen-containing plasma, combined with silicon plasma, in a plasma-enhanced chemical vapor deposition process to form a controlled interface layer, such as silicon nitride, between the contact and active metal layers, allowing for precise thickness control and reduced active metal diffusion, thereby enhancing the manufacturability and reliability of two-terminal memory cells.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional semiconductor manufacturing processes are used to form interface layers, then the fabrication process is simple, but the thickness and composition control of interface layers is poor leading to active metal contamination

Engineering Contradiction:
Improveinterface layer thickness and composition controlVSAvoidfabrication process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies parameter changes by utilizing plasma-enhanced chemical vapor deposition (PECVD) to precisely control the thickness and composition of the interface layer. By adjusting plasma parameters (power, pressure, gas flow rates) and deposition temperature, the process achieves superior interface layer control compared to conventional methods, directly resolving the contradiction between manufacturing precision and process complexity.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent introduces a nitrogen-containing plasma as an intermediary substance during the deposition process. This plasma mediates the formation of the interface layer by providing controlled nitrogen incorporation, which prevents active metal diffusion and contamination while maintaining precise thickness control, thus improving manufacturing precision without excessive complexity increase.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If interface layer thickness is not precisely controlled, then the fabrication process is faster, but active metal diffusion and contamination occur reducing memory device reliability

Engineering Contradiction:
Improvememory device reliabilityVSAvoidfabrication speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies preliminary action by forming a precisely controlled interface layer with specific thickness and composition before depositing the active metal layer. This pre-formed interface layer acts as a diffusion barrier, preventing metal contamination and ensuring device reliability. The PECVD process enables this preliminary interface layer formation with atomic-level precision, resolving the contradiction between reliability and fabrication speed.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

By optimizing deposition parameters including plasma power, pressure, and gas composition, the process achieves rapid yet precise interface layer formation. The parameter optimization allows the interface layer to be formed quickly while maintaining the precise thickness control needed to prevent metal diffusion, thus improving both reliability and productivity simultaneously.

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If nitrogen-containing plasma is used to form interface layer, then active metal diffusion is reduced and interface quality is improved, but the fabrication process becomes more complex

Engineering Contradiction:
Improveinterface layer qualityVSAvoidplasma deposition process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies universality by using plasma-enhanced chemical vapor deposition (PECVD) equipment that can perform multiple functions: it deposits the interface layer, controls its thickness, adjusts its composition through gas composition control, and prevents metal diffusion. This multi-functional approach consolidates several process steps into one, improving interface layer quality while minimizing the increase in process complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent utilizes parameter changes in the PECVD process to achieve precise control over interface layer properties. By adjusting plasma parameters (power, pressure, gas flow rates) and deposition temperature, the process optimizes interface layer quality and composition without requiring additional process steps, thus improving manufacturing precision while keeping the process complexity manageable.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the formation of high-quality interface layers with controlled thickness and composition, reducing active metal contamination and improving the operational efficiency of two-terminal memory cells, while being compatible with CMOS architectures, thus enhancing memory device performance and reducing fabrication costs.

Implementation Method 1

The use of nitrogen-containing plasma, combined with silicon plasma, in a plasma-enhanced chemical vapor deposition process to form a controlled interface layer

Methodology Applied
Scientific EffectPlasma-enhanced chemical vapor deposition: Plasma Enhanced Chemical Vapour Deposition

Implementation Method 2

reducing active metal diffusion

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Data Source

PatentUS10693062B2Regulating interface layer formation for two-terminal memory
Publication Date: 2020.06.23 CROSSBAR INC
  • US10693062B2 patent drawing
  • US10693062B2 patent drawing
  • US10693062B2 patent drawing

AI summary

Provision of fabrication, construction, and/or assembly of a two-terminal memory device is described herein. The two-terminal memory device can include an active region with a silicon bearing layer, an interface layer, and an active metal layer. The interface layer can be grown on the silicon bearing layer, and the growth of the interface layer can be regulated with N2O plasma.