Interface Logic Model for Multiple Clock Input Timing Analysis
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Solution Overview
Problem
Traditional interface logic models struggle to accurately represent the features and characteristics of integrated circuits with multiple clock inputs, making it difficult to perform efficient static timing analysis.
Innovation Solution
A model-building method and system that extracts specific sub-netlists between different clock multi-vibrators and inputs/outputs to generate a new netlist, improving the traditional interface logic model by presenting features of multiple clock inputs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the traditional interface logic model extracts a greater number of partial key netlists to support multiple clock inputs, then the accuracy of static timing analysis is improved, but the time spent on static timing analysis increases significantly
Solution Approach 1:
The patent segments the clock inputs into different groups (first group and second group) and extracts corresponding sub-netlists for each group. This segmentation allows the model to handle multiple clock inputs systematically without extracting all possible partial key netlists, thereby reducing the overall extraction time while maintaining analysis accuracy.
Solution Approach 2:
The patent applies partial action by extracting only the necessary sub-netlists corresponding to different clock input groups rather than extracting all possible partial key netlists. This selective extraction approach achieves sufficient accuracy for static timing analysis while significantly reducing the time consumption compared to exhaustive extraction methods.
2Productivity
If the traditional interface logic model is used to generate a simplified netlist, then the model-building efficiency is improved, but the ability to present features of multiple clock inputs is lost
Solution Approach 1:
The patent segments the netlist extraction process into multiple sub-netlists, each corresponding to different clock input groups. This segmentation preserves the characteristics of multiple clock inputs in the simplified netlist while maintaining efficient model-building through systematic extraction rather than exhaustive methods.
Solution Approach 2:
The patent applies local quality by creating different sub-netlists with specific characteristics corresponding to different clock input groups. Each sub-netlist preserves the local features and characteristics of its associated clock inputs, ensuring that the simplified netlist maintains the necessary information about multiple clock inputs while remaining computationally efficient.
Data Source
AI summary
A model-building method and a model-building system for executing the method are disclosed. The method includes the following steps: reading a first netlist; extracting a netlist between an input and an initial-stage clock multi-vibrator and extracting a netlist between a final-stage clock multi-vibrator and an output from the first netlist; extracting a netlist between the input and the output from the first netlist; extracting a netlist between a first clock multi-vibrator and a second clock multi-vibrator from the first netlist; extracting netlists between the first clock input and the initial-stage clock multi-vibrator and the first clock multi-vibrator from the first netlist; extracting netlists between the second clock input and the final-stage clock multi-vibrator and the second clock multi-vibrator from the first netlist; and generating a second netlist based on extracted netlists.