Interface Module Detecting Composite Instructions in SoC

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Solution Overview

Problem

Interfacing between functional modules in Systems on a Chip (SoC) that comply with different communication protocols is challenging, especially when initiator modules execute composite instructions, as existing technologies lack a direct method to indicate whether an instruction is composite, leading to inefficient processing and potential conflicts during arbitration.

Innovation Solution

An interface and control module is introduced to detect composite instructions by monitoring the evolution of nondedicated information on the communication bus, generating a binary detection signal that indicates the execution of composite instructions, allowing for appropriate interfacing and arbitration between modules with different protocols.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the target module provides for the execution of a handshake before processing each request, then communication reliability between modules with different protocols is improved, but the processing time increases due to multiple successive handshakes for composite instructions

Engineering Contradiction:
Improvecommunication reliabilityVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The interface module performs preliminary detection of composite instructions by monitoring the initiator module's output signals before the target module executes handshakes. This allows the system to prepare for multiple handshakes in advance, optimizing the timing and coordination of protocol conversion operations, thereby reducing overall processing time while maintaining reliability

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The interface module acts as an intermediary between the initiator and target modules, detecting composite instructions and coordinating the handshake process. It monitors the initiator's output to identify composite instructions and manages the multiple handshakes required by the target module, thereby resolving the timing conflict between reliability requirements and processing speed

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If an arbitration mechanism is provided to arbitrate conflicting requests from several initiator modules, then access control to common resources is improved, but access conflicts may occur during the execution of successive requests corresponding to a single composite instruction

Engineering Contradiction:
Improveaccess controlVSAvoidinstruction execution efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The interface module implements feedback by continuously monitoring the initiator module's output signals to detect composite instructions. This feedback mechanism allows the interface to identify when multiple requests belong to a single composite instruction, enabling it to coordinate with the arbitration mechanism to prevent premature arbitration of subsequent requests, thereby maintaining both access control reliability and execution efficiency

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The interface module performs preliminary detection of composite instructions before the arbitration mechanism processes individual requests. By identifying composite instructions in advance, the system can temporarily suspend arbitration for subsequent requests belonging to the same composite instruction, preventing access conflicts while maintaining proper resource control

Inventive Principle:
Principle #10Preliminary action

3Adaptability or versatility

If the initiator module executes composite instructions comprising multiple elementary operations, then functional capability is improved, but protocol compatibility becomes more difficult as no direct indication is provided whether an instruction is composite

Engineering Contradiction:
Improvefunctional capabilityVSAvoidprotocol compatibility
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The interface module performs self-service by autonomously monitoring the initiator module's output signals and detecting composite instructions without requiring modifications to the initiator module itself. It extracts protocol compatibility information from the initiator's existing output, thereby maintaining functional capability while simplifying protocol compatibility through self-detection rather than requiring additional indication mechanisms

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The interface module serves as an intermediary that translates between the initiator module's protocol and the target module's protocol. It detects composite instructions by monitoring the initiator's output and uses this information to coordinate protocol conversion, thereby enabling protocol compatibility between modules with different specifications without requiring direct indication from the initiator

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS7313646B2Interfacing of functional modules in an on-chip system
Publication Date: 2007.12.25 STMICROELECTRONICS FRANCE
  • US7313646B2 patent drawing
  • US7313646B2 patent drawing
  • US7313646B2 patent drawing

AI summary

An electronic system comprises an initiator module and a target module addressable by the initiator module, and an interface and control module for interfacing between respective communication protocols of the initiator module and of the target module. The interface and control module is constructed to set a composite instruction detection signal in response to the detection of a composite instruction executed by the initiator module, which composite instruction detection signal is used for the interfacing. The interface and control module is constructed to detect a composite instruction executed by the initiator module when, at a determined clock cycle of the initiator module, a change of the elementary operation executed by the initiator module is detected with respect to the previous clock cycle of the initiator module, while, at the same time, a signal for selecting the target module which was active is kept active.