Interface Module for Secure External Memory Storage
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Solution Overview
Problem
Microcontrollers in safety-critical applications, such as motor vehicles, face limitations in internal working memory capacity and lack error correction in external expandable memory solutions, leading to inefficiencies in data storage and retrieval.
Innovation Solution
An interface module within the microcontroller calculates memory addresses and error correction values independently, allowing for secure storage and retrieval of data elements in external memory without modifying existing processor cores or software, using a serial data bus like SPI for efficient error correction and mapping logical to physical memory addresses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error correction is implemented in external memory, then data reliability is improved, but memory access time increases due to separate addressing phases for data and ECC values
Solution Approach 1:
The patent combines data elements and ECC values into a single memory addressable unit, allowing both to be written and read in one addressing phase. This merging eliminates the need for separate addressing operations that would otherwise be required to access data and ECC values independently, thus reducing memory access time while maintaining error correction capability.
Solution Approach 2:
The interface module pre-calculates memory addresses for both data elements and ECC values during the addressing phase, preparing all necessary address information in advance. This preliminary address calculation enables simultaneous access to both data and ECC values without requiring additional addressing cycles, thereby reducing overall memory access time.
2Reliability
If error correction functionality is integrated into the microcontroller, then data security is improved, but device complexity increases
Solution Approach 1:
The patent introduces an interface module as an intermediary component between the processor core and external memory. This interface module handles all error correction operations, address calculations, and data/ECC value management, isolating the complexity from the processor core. The interface module acts as a buffer that manages the complex error correction functionality without requiring modifications to the existing processor architecture.
Solution Approach 2:
The interface module autonomously performs error correction calculations, address generation, and data validation without requiring intervention from the processor core or software. The module self-manages the entire error correction process, including calculating ECC values, mapping logical addresses to physical addresses, and verifying data integrity, thereby reducing the complexity burden on the overall microcontroller system.
3Quantity of substance
If external memory is used to expand working memory capacity, then memory capacity is improved, but error correction capability is lost
Solution Approach 1:
The patent segments each data element into a composite structure that includes both the original data and associated ECC values. This segmentation allows the external memory to store not only data but also error correction information in an organized manner. The interface module manages these segmented data-ECC units, ensuring that error correction capability is maintained across the expanded external memory capacity.
Data Source
AI summary
A method for the secured storing of a data element in an external memory, which is connected to a microcontroller via an interface module, which is configured to calculate memory addresses for data to be stored and for error correction values. The method includes receiving the data element to be stored by the interface module, a calculation by the interface module of a memory address in the external memory for the data element to be stored, and a writing, starting at the memory address, of the data element and of the error correction value via the interface module into the external memory, the error correction value immediately following the data element being written and the writing taking place within one addressing phase. A corresponding interface module, a corresponding microcontroller, and a corresponding control unit are also described.