Interfacial Dual Passivation Layer for Ferroelectric Device Stability

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Conventional ferroelectric field effect transistors (FeFETs) face challenges in achieving uniform ferroelectric characteristics due to interfacial excess metal ions and varying oxygen concentrations at the ferroelectric and metal oxide semiconductor interface, leading to instability and non-uniform switching.

Innovation Solution

An interfacial dual passivation layer comprising a metal-rich metal oxide layer and a dielectric metal nitride layer is introduced between the ferroelectric dielectric layer and the metal oxide semiconductor layer, formed through nitridation treatment or deposition processes, to stabilize the interface and reduce metal-metal coordination, thereby enhancing ferroelectric switching and device uniformity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a direct interface is formed between ferroelectric dielectric layer and metal oxide semiconductor layer, then device structure is simple, but interfacial excess metal ions and varying oxygen concentrations cause non-uniform ferroelectric characteristics and instability

Engineering Contradiction:

Improveferroelectric characteristic uniformityVSAvoidinterface structure complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

An interfacial dual passivation layer comprising a metal-rich metal oxide layer and a dielectric metal nitride layer is introduced between the ferroelectric dielectric layer and the metal oxide semiconductor layer. This intermediary structure stabilizes the interface by reducing metal-metal coordination and controlling oxygen concentration, thereby eliminating non-uniform ferroelectric characteristics while maintaining a manageable layered structure.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Reliability

If conventional single-layer passivation is used, then manufacturing process is simple, but interface stability is insufficient due to excess metal ions and oxygen variation

Engineering Contradiction:

Improveinterface stabilityVSAvoidpassivation process complexity

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The passivation structure employs a composite dual-layer configuration: a metal-rich metal oxide layer (such as hafnium oxide with metal-rich stoichiometry) combined with a dielectric metal nitride layer (such as hafnium nitride). This composite structure provides enhanced interface stability through synergistic effects—the metal-rich oxide suppresses metal ion migration while the nitride layer controls oxygen concentration—overcoming the limitations of single-layer passivation.

Inventive Principle:

Principle #40Composite materials

3Manufacturing precision

If metal-rich metal oxide layer and dielectric metal nitride layer are deposited separately, then interface control precision is high, but deposition time and process steps increase

Engineering Contradiction:

Improveinterface composition controlVSAvoiddeposition speed

Core Design Contradiction:

Manufacturing precisionVSProductivity

Solution Approach 1:

The metal-rich metal oxide layer is formed first as a preliminary step before depositing the dielectric metal nitride layer. This sequential approach allows the first layer to establish a stable foundation that preconditions the interface, enabling better control of metal-metal coordination and oxygen distribution. The preliminary formation of the metal-rich oxide layer facilitates subsequent nitridation processes and ensures uniform ferroelectric characteristics.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The formation of the interfacial dual passivation layer is merged with the existing ferroelectric layer deposition process. The metal-rich metal oxide layer can be formed concurrently with or immediately followed by the ferroelectric dielectric layer deposition, and the dielectric metal nitride layer is integrated into the same processing sequence. This merging of steps maintains high interface control precision while reducing overall process time compared to completely separate deposition operations.

Inventive Principle:

Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The interfacial dual passivation layer stabilizes the ferroelectric characteristics, reduces variability, and facilitates uniform switching, improving the stability and performance of ferroelectric memory devices by minimizing oxygen deficiency and excess, and reducing energy barriers for programming.

Implementation Method 1

formed through nitridation treatment or deposition processes

Methodology Applied

Scientific EffectNitridation: Nitriding

Implementation Method 2

formed through nitridation treatment or deposition processes

Methodology Applied

Scientific EffectPhysical vapor deposition: Physical Vapour Deposition

Data Source

PatentUS20240347633A1Interfacial dual passivation layer for a ferroelectric device and methods of forming the same

Publication Date: 2024.10.17 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A semiconductor structure includes, from bottom to top or from top to bottom, a gate electrode, a ferroelectric dielectric layer, a metal-rich metal oxide layer, a dielectric metal nitride layer, and a metal oxide semiconductor layer. A ferroelectric field effect transistor may be provided by forming a source region and a drain region on the metal oxide semiconductor layer. The metal-rich metal oxide layer and the dielectric metal nitride layer homogenize and stabilize the interface between the ferroelectric dielectric layer and the metal oxide semiconductor layer, and reduce excess oxygen atoms at the interface, thereby improving switching characteristics of the ferroelectric field effect transistor.