Interlayer Insulator Structure to Reduce Wiring Signal Interference
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Solution Overview
Problem
The challenge in semiconductor device fabrication is to achieve high integration with improved reliability and yield, particularly in maintaining the integrity of fine patterns and reducing signal interference between wiring layers.
Innovation Solution
The semiconductor device design includes a substrate with multiple interlayer insulating layers of varying densities, where the second interlayer insulating layer is in direct contact with the first interlayer insulating layer, eliminating the need for a silicon nitride interlayer. This configuration enhances adhesion and reduces signal interference between wiring layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If a silicon nitride interlayer is inserted between interlayer insulating layers, then adhesion is improved, but signal interference between wiring layers increases
Solution Approach 1:
The patent removes the silicon nitride interlayer from the structure, extracting the harmful element that causes signal interference while accepting the trade-off of reduced adhesion. This is achieved by forming the second interlayer insulating layer in direct contact with the first interlayer insulating layer without inserting a silicon nitride layer between them.
Solution Approach 2:
The patent changes the material composition parameters of the interlayer insulating layers, specifically using a second interlayer insulating layer with a lower density than the first interlayer insulating layer. This parameter change allows direct contact between layers while managing adhesion and signal interference characteristics.
2Productivity
If line widths of patterns are reduced for high integration, then device integration is improved, but manufacturing precision becomes more difficult to maintain
Solution Approach 1:
The patent applies different material densities to different interlayer insulating layers, creating local quality variations that help maintain pattern integrity during high-integration fabrication. The first interlayer insulating layer has a higher density to provide structural support, while the second has a lower density to reduce signal interference.
Solution Approach 2:
The patent uses composite material structures with interlayer insulating layers of different densities. This composite approach combines the benefits of high-density materials for structural stability with low-density materials for reduced signal interference, enabling better maintenance of manufacturing precision in highly integrated devices.
Data Source
AI summary
A semiconductor device includes a first interlayer insulating layer on a substrate and including an upper surface at a first level, a second interlayer insulating layer on the first interlayer insulating layer, and including a material with less density than that of the first interlayer insulating layer, a first contact in the first interlayer insulating layer and having an upper surface at a second level higher than the first level, a through via in the first interlayer insulating layer and substrate, and having an upper surface at a third level higher than the second level, a first wiring in the second interlayer insulating layer, in contact with the first contact, and having a lower surface at a fourth level lower than the first level, and a second wiring in the second interlayer insulating layer, in contact with the through via, and having a fifth level lower than the fourth level.