Interleave Pattern Generation for Parallel Processing Load Balancing

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Solution Overview

Problem

Conventional CPUs are not suitable for demanding applications with large data sets due to their single-instruction, single-data processing capability, and there is a need for efficient load balancing in parallel processing systems to maximize processor utilization.

Innovation Solution

A method to determine an interleave pattern for n occurrences of A tasks and y occurrences of B tasks, where n+y equals a power of two or not, by generating a key using the reverse bit order of a serially indexed count, allowing for the creation of a table to automatically select an interleave pattern based on the number of tasks and processors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional CPUs execute a single program and operate on a single stream of data, then the CPU structure remains simple and easy to control, but the processing speed and capability are insufficient for demanding applications with large data sets

Engineering Contradiction:
Improveprocessing capabilityVSAvoidCPU structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the processing system into multiple processing elements (PEs) that can operate in parallel. Each PE handles a portion of the data stream, transforming the single-stream SISD architecture into a multi-stream SIMD architecture, thereby improving processing capability for demanding applications.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from single-dimensional sequential processing to multi-dimensional parallel processing by introducing multiple data streams and processing elements. This dimensional expansion allows simultaneous processing of multiple data items, significantly enhancing productivity for large data sets.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If parallel processing systems use multiple processing units to simultaneously perform tasks on data streams, then processing speed and productivity improve, but load balancing becomes complex and difficult to optimize

Engineering Contradiction:
Improveprocessing speedVSAvoidload balancing complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by pre-calculating and storing optimal interleave patterns in a lookup table during system initialization or offline. These precomputed patterns provide the interleave interval information needed for load balancing, eliminating the need for complex real-time calculations and simplifying the runtime load balancing operation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces an intermediary interleave pattern table that mediates between the multiple processing units and the data streams. This table stores precomputed interleave intervals that guide how data should be distributed to PEs, simplifying the load balancing complexity by providing ready-made distribution strategies.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Loss of time

If tasks are distributed across multiple processing elements without optimal interleave patterns, then processor utilization may be inefficient with increased idle time, but determining optimal interleave patterns requires complex calculations

Engineering Contradiction:
Improveidle timeVSAvoidcalculation complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent minimizes idle time by pre-calculating optimal interleave patterns and storing them in a table before runtime. This preliminary action ensures that during actual parallel processing, the system can directly apply these preoptimized patterns without performing complex real-time calculations, thereby reducing both idle time and runtime computational overhead.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses copying by storing precomputed interleave patterns in a lookup table that can be quickly referenced and applied. Instead of recalculating optimal distribution patterns for each processing scenario, the system copies and applies prevalidated patterns from the table, reducing calculation complexity while maintaining optimal processor utilization.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS7503046B2Method of obtaining interleave interval for two data values
Publication Date: 2009.03.10 MICRON TECHNOLOGY INC
  • US7503046B2 patent drawing
  • US7503046B2 patent drawing
  • US7503046B2 patent drawing

AI summary

A method of determining an interleave pattern for n lots of A and y lots of B, when n plus y equals a power of two such that the expression 2z−n may be used to represent the value of y, includes generating a key including the reverse bit order of a serially indexed count from 0 to 2z. An interleave pattern can be generated from the key in which all values less than n are replace by A and all other values are replaced by B. The key can be used to generate a table that contains all possible combinations of values of A and B. The table can then be stored such that an interleave pattern can be automatically selected based on either the number of lots of A or the number of lots of B.