Time-Interleaved ADC Tracking Phases to Reduce Kickback Noise

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Solution Overview

Problem

Analog-to-digital converter (ADC) circuits experience noise and inaccuracies due to kickback, which occurs when residual charge on sample and hold structures flows back during sampling, affecting the conversion results, especially in time-interleaved operations.

Innovation Solution

The implementation of multiple ADC circuits with control logic circuitry that advances them through time-interleaved conversions, including acquisition, conversion, and tracking phases, where the control logic updates the ADC circuits with the most recent conversion information from other ADCs during the tracking phase before the acquisition phase, reducing kickback by staggering phases and using a tracking phase to minimize residual charge.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple ADC circuits are time-interleaved to increase conversion rate, then productivity is improved, but noise and inaccuracies increase due to kickback

Engineering Contradiction:
Improveconversion rateVSAvoidnoise and inaccuracies
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent divides the ADC operation into multiple independent phases (acquisition phase, conversion phase, and tracking phase) that can be time-interleaved across multiple ADC circuits. This segmentation allows each circuit to operate in a controlled manner, reducing kickback effects while maintaining high conversion rates through parallel processing.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The tracking phase is introduced as a preliminary action before the acquisition phase, where ADC circuits update themselves with recent conversion information from other circuits. This preliminary updating minimizes residual charge and reduces kickback effects before the next sampling operation begins.

Inventive Principle:
Principle #10Preliminary action

2Device complexity

If ADC circuits operate continuously without tracking phase, then device complexity is reduced, but kickback and dielectric absorption increase

Engineering Contradiction:
Improvecircuit operation phasesVSAvoidkickback and dielectric absorption
Core Design Contradiction:
Device complexityVSObject-generated harmful factors

Solution Approach 1:

The patent implements periodic tracking phases interspersed between acquisition and conversion phases in a cyclic manner. This periodic action allows ADC circuits to regularly update their state and minimize residual charge, reducing kickback and dielectric absorption effects without requiring continuous complex operations.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

During the tracking phase, each ADC circuit updates itself with conversion information from other circuits in the time-interleaved system. This self-service mechanism allows circuits to autonomously minimize their own kickback effects without requiring external intervention or additional complex control structures.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS10707889B1Interleaving method for analog to digital converters
Publication Date: 2020.07.07 ANALOG DEVICES INT UNLTD CO
  • US10707889B1 patent drawing
  • US10707889B1 patent drawing
  • US10707889B1 patent drawing

AI summary

An electronic circuit comprises multiple analog-to-digital converter (ADC) circuits and control logic circuitry. The control logic circuitry advances the multiple ADC circuits through multiple time-interleaved conversions that include time-interleaved acquisition phases, conversion phases, and tracking phases. An acquisition phase of a first ADC circuit samples the analog signal, a conversion phase of the first ADC circuit converts the sampled analog signal to a digital value, and the control logic circuitry is configured to update the first ADC circuit with most recent A/D conversion information by a different ADC circuit during a tracking phase of the first ADC circuit before the acquisition phase of the first ADC circuit.