Time-Interleaved ADC Randomization for Harmonic Noise Reduction
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Solution Overview
Problem
In mixed signal circuits, capacitor mismatches lead to inaccurate signal transfer, resulting in noisy outputs with lower effective resolution due to harmonic noise interference.
Innovation Solution
A time-interleaved analog to digital converter (ADC) with a plurality of capacitor array circuits, successive approximation register circuitry, and noise shaping circuitry that alternately samples input signals and randomly selects switched-capacitor circuits to perform noise shaping, reducing the impact of harmonic noise by avoiding predetermined sequence transfers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If capacitor array circuits transfer signals in a predetermined sequence, then the circuit operation is simple and stable, but capacitor mismatches cause harmonic noise and reduce effective resolution
Solution Approach 1:
The patent applies dynamics by randomly selecting which capacitor array circuit transfers the residue signal in each conversion cycle, rather than following a fixed predetermined sequence. This randomization dynamically changes the transfer pattern, which decorrelates the harmonic noise from the signal bandwidth, effectively reducing its impact and improving measurement precision without significantly increasing operational complexity
Solution Approach 2:
The patent changes the operational parameter of the capacitor array circuits by introducing random selection of active circuits. Instead of a static assignment where specific circuits always transfer signals in a fixed order, the system dynamically changes which circuit performs the transfer function in each cycle, altering the noise characteristics while maintaining the same underlying hardware structure
Data Source
AI summary
A time-interleaved analog to digital converter includes capacitor array circuits, at least one successive approximation register circuitry, and at least one noise shaping circuitry. The capacitor array circuits are configured to alternately sample an input signal, in order to generate a sampled input signal. The at least one successive approximation register circuitry is configured to perform an analog to digital conversion according to the sampled input signal and a residue signal, in order to generate at least one digital output. The at least one noise shaping circuitry is configured to utilize at least one first circuit in switched-capacitor circuits to transfer the residue signal from a first capacitor array circuit in the capacitor array circuits, and randomly select at least one second circuit from the switched-capacitor circuits to cooperate with a second capacitor array circuit in the capacitor array circuits to sample the input signal.