Time-Interleaved ADC Stage With Shared Pre-Amp and Dual Latches
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Solution Overview
Problem
Conventional time-interleaved analog-to-digital conversion devices require multiple sample-and-hold units, pre-amp units, and latch units per stage, leading to increased area and power consumption.
Innovation Solution
A time-interleaved analog-to-digital conversion device with a shared pre-amp unit among two latch units, where the pre-amp is reset between the enablement times of the latch units, reducing the overall area and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple sample-and-hold units, pre-amp units, and latch units are used per ADC stage in a time-interleaved structure, then the conversion speed and throughput are improved, but the area and power consumption increase
Solution Approach 1:
The patent merges multiple pre-amp units into a shared pre-amp unit that serves multiple latch units. Specifically, a first pre-amp unit shares its output with both a first latch unit and a second latch unit, reducing the total number of pre-amp units required in the time-interleaved ADC structure
Solution Approach 2:
The shared pre-amp unit performs multiple functions by serving different latch units at different time intervals. The pre-amp unit amplifies analog input data for the first latch unit during its active period, then switches to amplify data for the second latch unit, making the pre-amp unit universal rather than dedicated to a single latch unit
2Productivity
If multiple sample-and-hold units, pre-amp units, and latch units are used per ADC stage in a time-interleaved structure, then the conversion speed and throughput are improved, but the power consumption increases
Solution Approach 1:
The patent merges multiple pre-amp units into a shared pre-amp unit that serves multiple latch units. Specifically, a first pre-amp unit shares its output with both a first latch unit and a second latch unit, reducing the total number of pre-amp units required in the time-interleaved ADC structure
Solution Approach 2:
The system uses periodic switching between different latch units with the shared pre-amp unit. The pre-amp unit operates periodically, serving the first latch unit during its time slot, then switching to serve the second latch unit in its time slot, thereby reducing overall power consumption while maintaining continuous conversion throughput
3Area of stationary object
If a shared pre-amp unit is used among multiple latch units, then the area and power consumption are reduced, but the timing control complexity increases
Solution Approach 1:
The patent introduces dynamic switching control to manage the shared pre-amp unit. Switching signals are generated based on the timing relationships between different latch units, dynamically connecting the pre-amp unit to the appropriate latch unit at the correct time intervals. This dynamic control enables the shared resource to be efficiently allocated without permanent complex wiring
Solution Approach 2:
The patent introduces switching units as intermediaries between the shared pre-amp unit and multiple latch units. These switching units act as mediators that receive switching signals and accordingly connect or disconnect the pre-amp unit from different latch units, simplifying the overall control architecture by localizing the switching logic at each latch unit interface
Data Source
AI summary
An analog-to-digital (A/D) conversion device is provided and includes a first A/D conversion stage. The A/D conversion stage includes a first pre-amp unit, first and second latch units, and a first conversion unit. The first pre-amp unit amplifies the analog input data and outputs a first amplified data. The first and second latch units are enabled by first and second latch clock signals to latch the first and second amplified data and generate first and second latched data, respectively. The first pre-amp unit is reset between a time point when the first latch unit is enabled and a time point when the second latch unit is enabled. The first conversion unit receives the analog input data, and the first and second latched data and accordingly generates a first analog output data.


