Interleaved ADC Time Skew Extraction Without Multipliers
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Solution Overview
Problem
Conventional time skew extraction techniques for interleaved analog-to-digital converters (ADCs) increase power consumption and require significant digital resources, and fail at certain frequencies due to the use of multiplier circuitry, limiting their effectiveness in achieving increased bandwidth.
Innovation Solution
A time skew extraction method using subtractor circuitry that computes distances and averages between samples from multiple channels, generating absolute values and differences to calculate time skew without multipliers, allowing for efficient calibration and reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional time skew extraction techniques using multipliers and adders are used, then time skew can be extracted, but power consumption increases and digital resources are significantly required
Solution Approach 1:
The patent extracts only the essential computational operation (subtraction) from the conventional multiplier-based approach. By removing the multiplier components and retaining only the subtractor functionality, the design achieves time skew extraction with significantly reduced power consumption and digital resource requirements while maintaining extraction capability.
Solution Approach 2:
The patent replaces expensive multiplier circuitry with inexpensive subtractor circuitry. The subtractor-based approach uses simpler, less resource-intensive components that consume less power and occupy fewer digital resources, effectively using 'cheaper' computational building blocks to achieve the same functional goal.
2Measurement precision
If conventional time skew extraction techniques using multipliers are used, then time skew can be extracted, but the system fails at certain frequencies requiring notch filters
Solution Approach 1:
The patent removes the multiplier components that cause frequency-related failures and notch filter requirements. By extracting only the subtractor functionality, the design eliminates the frequency limitations inherent in multiplier-based approaches, enabling operation across a broader frequency range without requiring additional notch filter circuitry.
3Speed
If interleaved ADCs are used to increase bandwidth, then sampling bandwidth increases, but time skew mismatch becomes a significant limiting factor
Solution Approach 1:
The patent implements a feedback mechanism where the subtractor-based time skew extraction continuously measures time skew mismatch between interleaved channels and provides correction signals. This feedback loop enables dynamic compensation for time skew errors, allowing the system to maintain high sampling bandwidth while actively correcting time skew mismatch to preserve measurement precision.
Data Source
AI summary
An exemplary integrated circuit for performing time skew extraction includes a first subtractor, an array of subtractors separate from the first subtractor, and an array of averaging circuits. Inputs of the first subtractor are coupled to outputs of a plurality of channels of an interleaved analog-to-digital-converter and computes distances between samples of a signal that are measured consecutively by pairs of channels in the plurality of channels. At least some averaging circuits in the array of averaging circuits compute an average of those of the distances that correspond to a respective one of the pairs of channels; one averaging circuit in the array of averaging circuits computes an average of all of the distances. Each subtractor in the array of subtractors computes a difference between an average computed by one of the at least some of the averaging circuits and the average of all of the distances.