Interleaved BCH Coding With Shared Redundancy for Low-Latency Decoding
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing memory systems face challenges in achieving balanced error correction with interleaved codes, as they often compromise on latency, throughput, and power consumption, especially in portable devices, and previous methods are inefficient in decoding and correcting errors in nested interleaves.
Innovation Solution
The implementation of generalized integrated interleaved (GII) BCH codes, which use a two-level interleaving scheme with nonuniform redundancy and shared check symbols, allowing for self-decoding and protection of shared redundancies, enabling more powerful error correction with reduced latency and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If integrated interleaved codes are used for error correction, then error correction capability is improved, but latency increases
Solution Approach 1:
The code is divided into multiple interleaves (first interleave, second interleave, etc.) that can be decoded independently and in parallel. Each interleave contains a portion of the data and shared check symbols, allowing simultaneous decoding operations across multiple interleaves rather than sequential processing, thereby reducing overall latency while maintaining strong error correction capability.
Solution Approach 2:
Check symbols are pre-calculated and shared across multiple interleaves during the encoding phase. This preliminary computation of redundant data allows the decoding phase to proceed more quickly by reusing these pre-computed check symbols across multiple interleaves, reducing the computational burden and latency during error correction.
2Reliability
If integrated interleaved codes are used for error correction, then error correction capability is improved, but power consumption increases
Solution Approach 1:
By segmenting the code into multiple interleaves that can be decoded independently, the decoding workload is distributed across parallel operations. This segmentation allows for more efficient utilization of hardware resources, reducing the overall power consumption required for error correction compared to processing a single large interleave sequentially.
Solution Approach 2:
The shared check symbols serve multiple interleaves simultaneously, making the redundancy information multi-functional. This universal usage of check symbols across multiple interleaves reduces the total amount of redundancy data that needs to be processed and stored, thereby reducing the power consumption associated with memory access and computational operations.
3Reliability
If integrated interleaved codes are used for error correction, then error correction capability is improved, but device complexity increases
Solution Approach 1:
The decoding process is segmented into independent operations for each interleave. Each interleave can be decoded separately using the same decoding algorithm, which simplifies the overall decoding architecture compared to handling a single large interleave. The segmentation allows for modular implementation and reduces the complexity of any single decoding unit.
Solution Approach 2:
Multiple interleaves share common check symbols, merging the redundancy information across different data portions. This merging approach reduces the total number of check symbols needed compared to having separate redundancy for each interleave, thereby reducing memory requirements and computational complexity while maintaining or improving error correction capability.
Data Source
AI summary
An example methods for interleaved BCH codes can include encoding a plurality of portions of data using a first generator polynomial to obtain a plurality of respective BCH codewords. The method can include encoding an additional BCH codeword based at least in part on a second plurality of portions of data and the plurality of BCH codewords using a second generator polynomial. The method can include outputting the plurality of respective BCH codewords and the additional BCH codeword.


